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authorShawn Guo <shawn.guo@freescale.com>2011-10-16 20:42:16 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-10-18 06:42:57 -0400
commit73d2b4cdfc09a7a858b3ea1f32f6218b21439b96 (patch)
treed17b0b7514f39b11fd1e0e7d3719f58736e5fb00 /arch/arm/boot
parent976d167615b64e14bc1491ca51d424e2ba9a5e84 (diff)
arm/mx5: add device tree support for imx53 boards
It adds device tree support for imx53 boards. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx53-ard.dts113
-rw-r--r--arch/arm/boot/dts/imx53-evk.dts120
-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts125
-rw-r--r--arch/arm/boot/dts/imx53-smd.dts169
-rw-r--r--arch/arm/boot/dts/imx53.dtsi301
5 files changed, 828 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
new file mode 100644
index 000000000000..2ab7f80a0a35
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -0,0 +1,113 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx53.dtsi"
15
16/ {
17 model = "Freescale i.MX53 Automotive Reference Design Board";
18 compatible = "fsl,imx53-ard", "fsl,imx53";
19
20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
22 };
23
24 memory {
25 reg = <0x70000000 0x40000000>;
26 };
27
28 soc {
29 aips@50000000 { /* AIPS1 */
30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */
33 wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */
34 status = "okay";
35 };
36 };
37
38 wdog@53f98000 { /* WDOG1 */
39 status = "okay";
40 };
41
42 iomuxc@53fa8000 {
43 compatible = "fsl,imx53-iomuxc-ard";
44 reg = <0x53fa8000 0x4000>;
45 };
46
47 uart0: uart@53fbc000 { /* UART1 */
48 status = "okay";
49 };
50 };
51
52 aips@60000000 { /* AIPS2 */
53 sdma@63fb0000 {
54 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
55 };
56 };
57 };
58
59 eim-cs1@f4000000 {
60 #address-cells = <1>;
61 #size-cells = <1>;
62 compatible = "fsl,eim-bus", "simple-bus";
63 reg = <0xf4000000 0x3ff0000>;
64 ranges;
65
66 lan9220@f4000000 {
67 compatible = "smsc,lan9220", "smsc,lan9115";
68 reg = <0xf4000000 0x2000000>;
69 phy-mode = "mii";
70 interrupt-parent = <&gpio1>;
71 interrupts = <31>;
72 reg-io-width = <4>;
73 smsc,irq-push-pull;
74 };
75 };
76
77 gpio-keys {
78 compatible = "gpio-keys";
79
80 home {
81 label = "Home";
82 gpios = <&gpio4 10 0>; /* GPIO5_10 */
83 linux,code = <102>; /* KEY_HOME */
84 gpio-key,wakeup;
85 };
86
87 back {
88 label = "Back";
89 gpios = <&gpio4 11 0>; /* GPIO5_11 */
90 linux,code = <158>; /* KEY_BACK */
91 gpio-key,wakeup;
92 };
93
94 program {
95 label = "Program";
96 gpios = <&gpio4 12 0>; /* GPIO5_12 */
97 linux,code = <362>; /* KEY_PROGRAM */
98 gpio-key,wakeup;
99 };
100
101 volume-up {
102 label = "Volume Up";
103 gpios = <&gpio4 13 0>; /* GPIO5_13 */
104 linux,code = <115>; /* KEY_VOLUMEUP */
105 };
106
107 volume-down {
108 label = "Volume Down";
109 gpios = <&gpio3 0 0>; /* GPIO4_0 */
110 linux,code = <114>; /* KEY_VOLUMEDOWN */
111 };
112 };
113};
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
new file mode 100644
index 000000000000..3f3a88185ff8
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -0,0 +1,120 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx53.dtsi"
15
16/ {
17 model = "Freescale i.MX53 Evaluation Kit";
18 compatible = "fsl,imx53-evk", "fsl,imx53";
19
20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
22 };
23
24 memory {
25 reg = <0x70000000 0x80000000>;
26 };
27
28 soc {
29 aips@50000000 { /* AIPS1 */
30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
33 wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */
34 status = "okay";
35 };
36
37 ecspi@50010000 { /* ECSPI1 */
38 fsl,spi-num-chipselects = <2>;
39 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
40 <&gpio2 19 0>; /* GPIO3_19 */
41 status = "okay";
42
43 flash: at45db321d@1 {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
47 spi-max-frequency = <25000000>;
48 reg = <1>;
49
50 partition@0 {
51 label = "U-Boot";
52 reg = <0x0 0x40000>;
53 read-only;
54 };
55
56 partition@40000 {
57 label = "Kernel";
58 reg = <0x40000 0x3c0000>;
59 };
60 };
61 };
62
63 esdhc@50020000 { /* ESDHC3 */
64 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
65 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
66 status = "okay";
67 };
68 };
69
70 wdog@53f98000 { /* WDOG1 */
71 status = "okay";
72 };
73
74 iomuxc@53fa8000 {
75 compatible = "fsl,imx53-iomuxc-evk";
76 reg = <0x53fa8000 0x4000>;
77 };
78
79 uart0: uart@53fbc000 { /* UART1 */
80 status = "okay";
81 };
82 };
83
84 aips@60000000 { /* AIPS2 */
85 sdma@63fb0000 {
86 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
87 };
88
89 i2c@63fc4000 { /* I2C2 */
90 status = "okay";
91
92 pmic: mc13892@08 {
93 compatible = "fsl,mc13892", "fsl,mc13xxx";
94 reg = <0x08>;
95 };
96
97 codec: sgtl5000@0a {
98 compatible = "fsl,sgtl5000";
99 reg = <0x0a>;
100 };
101 };
102
103 fec@63fec000 {
104 phy-mode = "rmii";
105 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
106 status = "okay";
107 };
108 };
109 };
110
111 leds {
112 compatible = "gpio-leds";
113
114 green {
115 label = "Heartbeat";
116 gpios = <&gpio6 7 0>; /* GPIO7_7 */
117 linux,default-trigger = "heartbeat";
118 };
119 };
120};
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
new file mode 100644
index 000000000000..ae6de6d0c3f1
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -0,0 +1,125 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx53.dtsi"
15
16/ {
17 model = "Freescale i.MX53 Quick Start Board";
18 compatible = "fsl,imx53-qsb", "fsl,imx53";
19
20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
22 };
23
24 memory {
25 reg = <0x70000000 0x40000000>;
26 };
27
28 soc {
29 aips@50000000 { /* AIPS1 */
30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
33 status = "okay";
34 };
35
36 esdhc@50020000 { /* ESDHC3 */
37 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
38 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
39 status = "okay";
40 };
41 };
42
43 wdog@53f98000 { /* WDOG1 */
44 status = "okay";
45 };
46
47 iomuxc@53fa8000 {
48 compatible = "fsl,imx53-iomuxc-qsb";
49 reg = <0x53fa8000 0x4000>;
50 };
51
52 uart0: uart@53fbc000 { /* UART1 */
53 status = "okay";
54 };
55 };
56
57 aips@60000000 { /* AIPS2 */
58 sdma@63fb0000 {
59 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
60 };
61
62 i2c@63fc4000 { /* I2C2 */
63 status = "okay";
64
65 codec: sgtl5000@0a {
66 compatible = "fsl,sgtl5000";
67 reg = <0x0a>;
68 };
69 };
70
71 i2c@63fc8000 { /* I2C1 */
72 status = "okay";
73
74 accelerometer: mma8450@1c {
75 compatible = "fsl,mma8450";
76 reg = <0x1c>;
77 };
78
79 pmic: dialog@48 {
80 compatible = "dialog,da9053", "dialog,da9052";
81 reg = <0x48>;
82 };
83 };
84
85 fec@63fec000 {
86 phy-mode = "rmii";
87 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
88 status = "okay";
89 };
90 };
91 };
92
93 gpio-keys {
94 compatible = "gpio-keys";
95
96 power {
97 label = "Power Button";
98 gpios = <&gpio0 8 0>; /* GPIO1_8 */
99 linux,code = <116>; /* KEY_POWER */
100 gpio-key,wakeup;
101 };
102
103 volume-up {
104 label = "Volume Up";
105 gpios = <&gpio1 14 0>; /* GPIO2_14 */
106 linux,code = <115>; /* KEY_VOLUMEUP */
107 };
108
109 volume-down {
110 label = "Volume Down";
111 gpios = <&gpio1 15 0>; /* GPIO2_15 */
112 linux,code = <114>; /* KEY_VOLUMEDOWN */
113 };
114 };
115
116 leds {
117 compatible = "gpio-leds";
118
119 user {
120 label = "Heartbeat";
121 gpios = <&gpio6 7 0>; /* GPIO7_7 */
122 linux,default-trigger = "heartbeat";
123 };
124 };
125};
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
new file mode 100644
index 000000000000..b1c062eea715
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -0,0 +1,169 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx53.dtsi"
15
16/ {
17 model = "Freescale i.MX53 Smart Mobile Reference Design Board";
18 compatible = "fsl,imx53-smd", "fsl,imx53";
19
20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
22 };
23
24 memory {
25 reg = <0x70000000 0x40000000>;
26 };
27
28 soc {
29 aips@50000000 { /* AIPS1 */
30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
33 wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */
34 status = "okay";
35 };
36
37 esdhc@50008000 { /* ESDHC2 */
38 fsl,card-wired;
39 status = "okay";
40 };
41
42 uart2: uart@5000c000 { /* UART3 */
43 fsl,uart-has-rtscts;
44 status = "okay";
45 };
46
47 ecspi@50010000 { /* ECSPI1 */
48 fsl,spi-num-chipselects = <2>;
49 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
50 <&gpio2 19 0>; /* GPIO3_19 */
51 status = "okay";
52
53 zigbee: mc1323@0 {
54 compatible = "fsl,mc1323";
55 spi-max-frequency = <8000000>;
56 reg = <0>;
57 };
58
59 flash: m25p32@1 {
60 #address-cells = <1>;
61 #size-cells = <1>;
62 compatible = "st,m25p32", "st,m25p";
63 spi-max-frequency = <20000000>;
64 reg = <1>;
65
66 partition@0 {
67 label = "U-Boot";
68 reg = <0x0 0x40000>;
69 read-only;
70 };
71
72 partition@40000 {
73 label = "Kernel";
74 reg = <0x40000 0x3c0000>;
75 };
76 };
77 };
78
79 esdhc@50020000 { /* ESDHC3 */
80 fsl,card-wired;
81 status = "okay";
82 };
83 };
84
85 wdog@53f98000 { /* WDOG1 */
86 status = "okay";
87 };
88
89 iomuxc@53fa8000 {
90 compatible = "fsl,imx53-iomuxc-smd";
91 reg = <0x53fa8000 0x4000>;
92 };
93
94 uart0: uart@53fbc000 { /* UART1 */
95 status = "okay";
96 };
97
98 uart1: uart@53fc0000 { /* UART2 */
99 status = "okay";
100 };
101 };
102
103 aips@60000000 { /* AIPS2 */
104 sdma@63fb0000 {
105 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
106 };
107
108 i2c@63fc4000 { /* I2C2 */
109 status = "okay";
110
111 codec: sgtl5000@0a {
112 compatible = "fsl,sgtl5000";
113 reg = <0x0a>;
114 };
115
116 magnetometer: mag3110@0e {
117 compatible = "fsl,mag3110";
118 reg = <0x0e>;
119 };
120
121 touchkey: mpr121@5a {
122 compatible = "fsl,mpr121";
123 reg = <0x5a>;
124 };
125 };
126
127 i2c@63fc8000 { /* I2C1 */
128 status = "okay";
129
130 accelerometer: mma8450@1c {
131 compatible = "fsl,mma8450";
132 reg = <0x1c>;
133 };
134
135 camera: ov5642@3c {
136 compatible = "ovti,ov5642";
137 reg = <0x3c>;
138 };
139
140 pmic: dialog@48 {
141 compatible = "dialog,da9053", "dialog,da9052";
142 reg = <0x48>;
143 };
144 };
145
146 fec@63fec000 {
147 phy-mode = "rmii";
148 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
149 status = "okay";
150 };
151 };
152 };
153
154 gpio-keys {
155 compatible = "gpio-keys";
156
157 volume-up {
158 label = "Volume Up";
159 gpios = <&gpio1 14 0>; /* GPIO2_14 */
160 linux,code = <115>; /* KEY_VOLUMEUP */
161 };
162
163 volume-down {
164 label = "Volume Down";
165 gpios = <&gpio1 15 0>; /* GPIO2_15 */
166 linux,code = <114>; /* KEY_VOLUMEDOWN */
167 };
168 };
169};
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
new file mode 100644
index 000000000000..099cd84ee372
--- /dev/null
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -0,0 +1,301 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/include/ "skeleton.dtsi"
14
15/ {
16 aliases {
17 serial0 = &uart0;
18 serial1 = &uart1;
19 serial2 = &uart2;
20 serial3 = &uart3;
21 serial4 = &uart4;
22 };
23
24 tzic: tz-interrupt-controller@0fffc000 {
25 compatible = "fsl,imx53-tzic", "fsl,tzic";
26 interrupt-controller;
27 #interrupt-cells = <1>;
28 reg = <0x0fffc000 0x4000>;
29 };
30
31 clocks {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 ckil {
36 compatible = "fsl,imx-ckil", "fixed-clock";
37 clock-frequency = <32768>;
38 };
39
40 ckih1 {
41 compatible = "fsl,imx-ckih1", "fixed-clock";
42 clock-frequency = <22579200>;
43 };
44
45 ckih2 {
46 compatible = "fsl,imx-ckih2", "fixed-clock";
47 clock-frequency = <0>;
48 };
49
50 osc {
51 compatible = "fsl,imx-osc", "fixed-clock";
52 clock-frequency = <24000000>;
53 };
54 };
55
56 soc {
57 #address-cells = <1>;
58 #size-cells = <1>;
59 compatible = "simple-bus";
60 interrupt-parent = <&tzic>;
61 ranges;
62
63 aips@50000000 { /* AIPS1 */
64 compatible = "fsl,aips-bus", "simple-bus";
65 #address-cells = <1>;
66 #size-cells = <1>;
67 reg = <0x50000000 0x10000000>;
68 ranges;
69
70 spba@50000000 {
71 compatible = "fsl,spba-bus", "simple-bus";
72 #address-cells = <1>;
73 #size-cells = <1>;
74 reg = <0x50000000 0x40000>;
75 ranges;
76
77 esdhc@50004000 { /* ESDHC1 */
78 compatible = "fsl,imx53-esdhc";
79 reg = <0x50004000 0x4000>;
80 interrupts = <1>;
81 status = "disabled";
82 };
83
84 esdhc@50008000 { /* ESDHC2 */
85 compatible = "fsl,imx53-esdhc";
86 reg = <0x50008000 0x4000>;
87 interrupts = <2>;
88 status = "disabled";
89 };
90
91 uart2: uart@5000c000 { /* UART3 */
92 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
93 reg = <0x5000c000 0x4000>;
94 interrupts = <33>;
95 status = "disabled";
96 };
97
98 ecspi@50010000 { /* ECSPI1 */
99 #address-cells = <1>;
100 #size-cells = <0>;
101 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
102 reg = <0x50010000 0x4000>;
103 interrupts = <36>;
104 status = "disabled";
105 };
106
107 esdhc@50020000 { /* ESDHC3 */
108 compatible = "fsl,imx53-esdhc";
109 reg = <0x50020000 0x4000>;
110 interrupts = <3>;
111 status = "disabled";
112 };
113
114 esdhc@50024000 { /* ESDHC4 */
115 compatible = "fsl,imx53-esdhc";
116 reg = <0x50024000 0x4000>;
117 interrupts = <4>;
118 status = "disabled";
119 };
120 };
121
122 gpio0: gpio@53f84000 { /* GPIO1 */
123 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
124 reg = <0x53f84000 0x4000>;
125 interrupts = <50 51>;
126 gpio-controller;
127 #gpio-cells = <2>;
128 interrupt-controller;
129 #interrupt-cells = <1>;
130 };
131
132 gpio1: gpio@53f88000 { /* GPIO2 */
133 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
134 reg = <0x53f88000 0x4000>;
135 interrupts = <52 53>;
136 gpio-controller;
137 #gpio-cells = <2>;
138 interrupt-controller;
139 #interrupt-cells = <1>;
140 };
141
142 gpio2: gpio@53f8c000 { /* GPIO3 */
143 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
144 reg = <0x53f8c000 0x4000>;
145 interrupts = <54 55>;
146 gpio-controller;
147 #gpio-cells = <2>;
148 interrupt-controller;
149 #interrupt-cells = <1>;
150 };
151
152 gpio3: gpio@53f90000 { /* GPIO4 */
153 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
154 reg = <0x53f90000 0x4000>;
155 interrupts = <56 57>;
156 gpio-controller;
157 #gpio-cells = <2>;
158 interrupt-controller;
159 #interrupt-cells = <1>;
160 };
161
162 wdog@53f98000 { /* WDOG1 */
163 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
164 reg = <0x53f98000 0x4000>;
165 interrupts = <58>;
166 status = "disabled";
167 };
168
169 wdog@53f9c000 { /* WDOG2 */
170 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
171 reg = <0x53f9c000 0x4000>;
172 interrupts = <59>;
173 status = "disabled";
174 };
175
176 uart0: uart@53fbc000 { /* UART1 */
177 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
178 reg = <0x53fbc000 0x4000>;
179 interrupts = <31>;
180 status = "disabled";
181 };
182
183 uart1: uart@53fc0000 { /* UART2 */
184 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
185 reg = <0x53fc0000 0x4000>;
186 interrupts = <32>;
187 status = "disabled";
188 };
189
190 gpio4: gpio@53fdc000 { /* GPIO5 */
191 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
192 reg = <0x53fdc000 0x4000>;
193 interrupts = <103 104>;
194 gpio-controller;
195 #gpio-cells = <2>;
196 interrupt-controller;
197 #interrupt-cells = <1>;
198 };
199
200 gpio5: gpio@53fe0000 { /* GPIO6 */
201 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
202 reg = <0x53fe0000 0x4000>;
203 interrupts = <105 106>;
204 gpio-controller;
205 #gpio-cells = <2>;
206 interrupt-controller;
207 #interrupt-cells = <1>;
208 };
209
210 gpio6: gpio@53fe4000 { /* GPIO7 */
211 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
212 reg = <0x53fe4000 0x4000>;
213 interrupts = <107 108>;
214 gpio-controller;
215 #gpio-cells = <2>;
216 interrupt-controller;
217 #interrupt-cells = <1>;
218 };
219
220 i2c@53fec000 { /* I2C3 */
221 #address-cells = <1>;
222 #size-cells = <0>;
223 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
224 reg = <0x53fec000 0x4000>;
225 interrupts = <64>;
226 status = "disabled";
227 };
228
229 uart3: uart@53ff0000 { /* UART4 */
230 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
231 reg = <0x53ff0000 0x4000>;
232 interrupts = <13>;
233 status = "disabled";
234 };
235 };
236
237 aips@60000000 { /* AIPS2 */
238 compatible = "fsl,aips-bus", "simple-bus";
239 #address-cells = <1>;
240 #size-cells = <1>;
241 reg = <0x60000000 0x10000000>;
242 ranges;
243
244 uart4: uart@63f90000 { /* UART5 */
245 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
246 reg = <0x63f90000 0x4000>;
247 interrupts = <86>;
248 status = "disabled";
249 };
250
251 ecspi@63fac000 { /* ECSPI2 */
252 #address-cells = <1>;
253 #size-cells = <0>;
254 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
255 reg = <0x63fac000 0x4000>;
256 interrupts = <37>;
257 status = "disabled";
258 };
259
260 sdma@63fb0000 {
261 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
262 reg = <0x63fb0000 0x4000>;
263 interrupts = <6>;
264 };
265
266 cspi@63fc0000 {
267 #address-cells = <1>;
268 #size-cells = <0>;
269 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
270 reg = <0x63fc0000 0x4000>;
271 interrupts = <38>;
272 status = "disabled";
273 };
274
275 i2c@63fc4000 { /* I2C2 */
276 #address-cells = <1>;
277 #size-cells = <0>;
278 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
279 reg = <0x63fc4000 0x4000>;
280 interrupts = <63>;
281 status = "disabled";
282 };
283
284 i2c@63fc8000 { /* I2C1 */
285 #address-cells = <1>;
286 #size-cells = <0>;
287 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
288 reg = <0x63fc8000 0x4000>;
289 interrupts = <62>;
290 status = "disabled";
291 };
292
293 fec@63fec000 {
294 compatible = "fsl,imx53-fec", "fsl,imx25-fec";
295 reg = <0x63fec000 0x4000>;
296 interrupts = <87>;
297 status = "disabled";
298 };
299 };
300 };
301};