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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-03-12 17:16:05 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-21 18:19:16 -0400
commit140e1721d108227cc3129c12dca1c5f8ccc7fb39 (patch)
tree6cbe4177eee49e5920af41146278671de51f1554 /arch/arm/boot/dts
parente476ac8b483de4ce1d8570509be343afc7cd3baf (diff)
ARM: sunxi: dt: Add PIO controller to A31 DTSI
The A31 has a different set of pins than the one found on the A10 and A13. Now that we have support for the A31 pin set in the pinctrl driver, we can enable it in the DTSI with its own compatible. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/sun6i-a31.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 4d076ec24885..902b1e672455 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -66,6 +66,18 @@
66 #size-cells = <1>; 66 #size-cells = <1>;
67 ranges; 67 ranges;
68 68
69 pio: pinctrl@01c20800 {
70 compatible = "allwinner,sun6i-a31-pinctrl";
71 reg = <0x01c20800 0x400>;
72 interrupts = <0 11 1>, <0 15 1>, <0 16 1>, <0 17 1>;
73 clocks = <&osc>;
74 gpio-controller;
75 interrupt-controller;
76 #address-cells = <1>;
77 #size-cells = <0>;
78 #gpio-cells = <3>;
79 };
80
69 timer@01c20c00 { 81 timer@01c20c00 {
70 compatible = "allwinner,sun4i-timer"; 82 compatible = "allwinner,sun4i-timer";
71 reg = <0x01c20c00 0xa0>; 83 reg = <0x01c20c00 0xa0>;