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authorAnson Huang <b20788@freescale.com>2013-01-30 17:33:44 -0500
committerShawn Guo <shawn.guo@linaro.org>2013-02-10 10:25:47 -0500
commit46743dd66224a2bc3bfb4a45b27bfc2a41bfda24 (patch)
tree72cd8deb50053291f585000c927896eb4638cad1 /arch/arm/boot/dts
parenta82b7b9c8b6a44b0f3983fb21dff90a9d18d9539 (diff)
ARM: dts: i.MX6: Add regulator delay support
For ANATOP LDOs, vddcpu, vddsoc and vddpu have step time settings in the misc2 register, need to add necessary step time info for these three LDOs, then regulator driver can add necessary delay based on these settings. offset 0x170: bit [24-25]: vddcpu bit [26-27]: vddpu bit [28-29]: vddsoc field definition: 0'b00: 64 cycles of 24M clock; 0'b01: 128 cycles of 24M clock; 0'b02: 256 cycles of 24M clock; 0'b03: 512 cycles of 24M clock; Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index ec092d294406..ad10d82c6160 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -487,6 +487,9 @@
487 anatop-reg-offset = <0x140>; 487 anatop-reg-offset = <0x140>;
488 anatop-vol-bit-shift = <0>; 488 anatop-vol-bit-shift = <0>;
489 anatop-vol-bit-width = <5>; 489 anatop-vol-bit-width = <5>;
490 anatop-delay-reg-offset = <0x170>;
491 anatop-delay-bit-shift = <24>;
492 anatop-delay-bit-width = <2>;
490 anatop-min-bit-val = <1>; 493 anatop-min-bit-val = <1>;
491 anatop-min-voltage = <725000>; 494 anatop-min-voltage = <725000>;
492 anatop-max-voltage = <1450000>; 495 anatop-max-voltage = <1450000>;
@@ -501,6 +504,9 @@
501 anatop-reg-offset = <0x140>; 504 anatop-reg-offset = <0x140>;
502 anatop-vol-bit-shift = <9>; 505 anatop-vol-bit-shift = <9>;
503 anatop-vol-bit-width = <5>; 506 anatop-vol-bit-width = <5>;
507 anatop-delay-reg-offset = <0x170>;
508 anatop-delay-bit-shift = <26>;
509 anatop-delay-bit-width = <2>;
504 anatop-min-bit-val = <1>; 510 anatop-min-bit-val = <1>;
505 anatop-min-voltage = <725000>; 511 anatop-min-voltage = <725000>;
506 anatop-max-voltage = <1450000>; 512 anatop-max-voltage = <1450000>;
@@ -515,6 +521,9 @@
515 anatop-reg-offset = <0x140>; 521 anatop-reg-offset = <0x140>;
516 anatop-vol-bit-shift = <18>; 522 anatop-vol-bit-shift = <18>;
517 anatop-vol-bit-width = <5>; 523 anatop-vol-bit-width = <5>;
524 anatop-delay-reg-offset = <0x170>;
525 anatop-delay-bit-shift = <28>;
526 anatop-delay-bit-width = <2>;
518 anatop-min-bit-val = <1>; 527 anatop-min-bit-val = <1>;
519 anatop-min-voltage = <725000>; 528 anatop-min-voltage = <725000>;
520 anatop-max-voltage = <1450000>; 529 anatop-max-voltage = <1450000>;