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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2013-04-09 17:06:38 -0400
committerJason Cooper <jason@lakedaemon.net>2013-04-15 10:53:46 -0400
commit3b723ae8c68af92977ac16144559e0ba884a35c2 (patch)
treed84df32f0d2e4d61d6e2c88ee62787f01cbfd3a0 /arch/arm/boot/dts
parent488d1a6ff9187319b55b0f886203b0410ffa2f5b (diff)
arm: mvebu: PCIe Device Tree informations for Armada 370 DB
The Marvell evaluation board (DB) for the Armada 370 SoC has 2 physical full-size PCIe slots, so we enable the corresponding PCIe interfaces in the Device Tree. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/armada-370-db.dts17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts
index e34b280ce6ec..6403acdbb75f 100644
--- a/arch/arm/boot/dts/armada-370-db.dts
+++ b/arch/arm/boot/dts/armada-370-db.dts
@@ -94,5 +94,22 @@
94 spi-max-frequency = <50000000>; 94 spi-max-frequency = <50000000>;
95 }; 95 };
96 }; 96 };
97
98 pcie-controller {
99 status = "okay";
100 /*
101 * The two PCIe units are accessible through
102 * both standard PCIe slots and mini-PCIe
103 * slots on the board.
104 */
105 pcie@1,0 {
106 /* Port 0, Lane 0 */
107 status = "okay";
108 };
109 pcie@2,0 {
110 /* Port 1, Lane 0 */
111 status = "okay";
112 };
113 };
97 }; 114 };
98}; 115};