Merge tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux into late/clksrc

This is the 2nd part of ARM timer clean-ups for 3.10. This series has
the following changes:

- Add sched_clock selection logic to select the highest frequency clock
- Use full 64-bit arch timer counter for sched_clock
- Convert arch timer, sp804 and integrator-cp timers to CLKSRC_OF and
adapt all users to use clocksource_of_init

* tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux:
  devtree: add binding documentation for sp804
  ARM: integrator-cp: convert use CLKSRC_OF for timer init
  ARM: versatile: use OF init for sp804 timer
  ARM: versatile: add versatile dtbs to dtbs target
  ARM: vexpress: remove extra timer-sp control register clearing
  ARM: dts: vexpress: disable CA9 core tile sp804 timer
  ARM: vexpress: remove sp804 OF init
  ARM: highbank: use OF init for sp804 timer
  ARM: timer-sp: convert to use CLKSRC_OF init
  OF: add empty of_device_is_available for !OF
  ARM: convert arm/arm64 arch timer to use CLKSRC_OF init
  ARM: make machine_desc->init_time default to clocksource_of_init
  ARM: arch_timer: use full 64-bit counter for sched_clock
  ARM: make sched_clock just call a function pointer
  ARM: sched_clock: allow changing to higher frequency counter

Signed-off-by: Olof Johansson <olof@lixom.net>

This has a nasty set of conflicts with the exynos MCT code, which was
moved in a separate branch, and then fixed up when merged in, but still
conflicts a bit here. It should have been sorted out by this merge though.

4 files changed, 18 insertions, 3 deletions

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9c6255884cbb..08d298db0090 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -165,6 +165,8 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
         tegra30-cardhu-a04.dtb \
         tegra114-dalmore.dtb \
         tegra114-pluto.dtb
+dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \
+        versatile-pb.dtb
 dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
         vexpress-v2p-ca9.dtb \
         vexpress-v2p-ca15-tc1.dtb \
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
index 8b119399025a..ff1aea0ee043 100644
--- a/arch/arm/boot/dts/integratorcp.dts
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -24,15 +24,15 @@
         };
 
         timer0: timer@13000000 {
-                compatible = "arm,sp804", "arm,primecell";
+                compatible = "arm,integrator-cp-timer";
         };
 
         timer1: timer@13000100 {
-                compatible = "arm,sp804", "arm,primecell";
+                compatible = "arm,integrator-cp-timer";
         };
 
         timer2: timer@13000200 {
-                compatible = "arm,sp804", "arm,primecell";
+                compatible = "arm,integrator-cp-timer";
         };
 
         pic: pic@14000000 {
diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts
index e2fe3195c0d1..dde75ae8b4b1 100644
--- a/arch/arm/boot/dts/versatile-ab.dts
+++ b/arch/arm/boot/dts/versatile-ab.dts
@@ -121,6 +121,18 @@
                         interrupts = <0>;
                 };
 
+                timer@101e2000 {
+                        compatible = "arm,sp804", "arm,primecell";
+                        reg = <0x101e2000 0x1000>;
+                        interrupts = <4>;
+                };
+
+                timer@101e3000 {
+                        compatible = "arm,sp804", "arm,primecell";
+                        reg = <0x101e3000 0x1000>;
+                        interrupts = <5>;
+                };
+
                 gpio0: gpio@101e4000 {
                         compatible = "arm,pl061", "arm,primecell";
                         reg = <0x101e4000 0x1000>;
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
index 1420bb14d95c..62d9b225dcce 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -98,6 +98,7 @@
                              <0 49 4>;
                 clocks = <&oscclk2>, <&oscclk2>;
                 clock-names = "timclk", "apb_pclk";
+                status = "disabled";
         };
 
         watchdog@100e5000 {