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authorTushar Behera <[tushar.behera@linaro.org]>2013-04-04 01:23:51 -0400
committerKukjin Kim <kgene.kim@samsung.com>2013-04-08 12:15:26 -0400
commitd01fc36bb70ba158541e0b0b9133b94a1325d44e (patch)
tree3d0234ad1d586f8f2397034eb123918ba8ea3ab3 /arch/arm/boot/dts
parentf8bfe2b050f3ce266427486a052d010c53241ce4 (diff)
ARM: dts: Add pin-control related changes for Arndale board
Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/exynos5250-arndale.dts13
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 5de019cb0e58..7e7a61e0f3ce 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -69,15 +69,12 @@
69 samsung,dw-mshc-ciu-div = <3>; 69 samsung,dw-mshc-ciu-div = <3>;
70 samsung,dw-mshc-sdr-timing = <2 3>; 70 samsung,dw-mshc-sdr-timing = <2 3>;
71 samsung,dw-mshc-ddr-timing = <1 2>; 71 samsung,dw-mshc-ddr-timing = <1 2>;
72 pinctrl-names = "default";
73 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
72 74
73 slot@0 { 75 slot@0 {
74 reg = <0>; 76 reg = <0>;
75 bus-width = <8>; 77 bus-width = <8>;
76 gpios = <&gpc0 0 2 0 3>, <&gpc0 1 2 0 3>,
77 <&gpc0 3 2 3 3>, <&gpc0 4 2 3 3>,
78 <&gpc0 5 2 3 3>, <&gpc0 6 2 3 3>,
79 <&gpc1 0 2 3 3>, <&gpc1 1 2 3 3>,
80 <&gpc1 2 2 3 3>, <&gpc1 3 2 3 3>;
81 }; 78 };
82 }; 79 };
83 80
@@ -93,14 +90,12 @@
93 samsung,dw-mshc-ciu-div = <3>; 90 samsung,dw-mshc-ciu-div = <3>;
94 samsung,dw-mshc-sdr-timing = <2 3>; 91 samsung,dw-mshc-sdr-timing = <2 3>;
95 samsung,dw-mshc-ddr-timing = <1 2>; 92 samsung,dw-mshc-ddr-timing = <1 2>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
96 95
97 slot@0 { 96 slot@0 {
98 reg = <0>; 97 reg = <0>;
99 bus-width = <4>; 98 bus-width = <4>;
100 samsung,cd-pinmux-gpio = <&gpc3 2 2 3 3>;
101 gpios = <&gpc3 0 2 0 3>, <&gpc3 1 2 0 3>,
102 <&gpc3 3 2 3 3>, <&gpc3 4 2 3 3>,
103 <&gpc3 5 2 3 3>, <&gpc3 6 2 3 3>;
104 }; 99 };
105 }; 100 };
106 101