aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts
diff options
context:
space:
mode:
authorMaxime Ripard <maxime.ripard@free-electrons.com>2015-03-03 05:43:17 -0500
committerGregory CLEMENT <gregory.clement@free-electrons.com>2015-03-17 04:08:21 -0400
commita87cd07b88b4797d50d11fa1089705a284ae087f (patch)
treeb33cc119f283471372923bb6850f1b5e10466a02 /arch/arm/boot/dts
parent0c2d652f0bd9fdfe367eca4ebf56ad354bf3b153 (diff)
ARM: mvebu: Enable Performance Monitor Unit on Armada XP/370 SoCs
The Armada 370 and XP SoCs have Cortex-A9 compatible CPUs, and with a Performance Monitoring Unit. Enable it so that we can have hardware-assisted perf support. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index 7b3393e264f8..ec96f0b36346 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -73,6 +73,11 @@
73 }; 73 };
74 }; 74 };
75 75
76 pmu {
77 compatible = "arm,cortex-a9-pmu";
78 interrupts-extended = <&mpic 3>;
79 };
80
76 soc { 81 soc {
77 #address-cells = <2>; 82 #address-cells = <2>;
78 #size-cells = <1>; 83 #size-cells = <1>;