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authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-11 02:42:43 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-11 02:42:43 -0500
commit21604cdcdcf9ea8c16b1656f78e2eff097244d66 (patch)
tree5469eb93e673f749c1caf9dd5536fb6855658f89 /arch/arm/boot/dts
parentbeb5bfe424fdc15be6cf9a56e182192c1a7c7982 (diff)
parentf3372c01816ec9e974e449cf7233408a31647dd3 (diff)
Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson: "This branch contains code cleanups, moves and removals for 3.13. Qualcomm msm targets had a bunch of code removal for legacy non-DT platforms. Nomadik saw more device tree conversions and cleanup of old code. Tegra has some code refactoring, etc. One longish patch series from Sebastian Hasselbarth changes the init_time hooks and tries to use a generic implementation for most platforms, since they were all doing more or less the same things. Finally the "shark" platform is removed in this release. It's been abandoned for a while and nobody seems to care enough to keep it around. If someone comes along and wants to resurrect it, the removal can easily be reverted and code brought back. Beyond this, mostly a bunch of removals of stale content across the board, etc" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (79 commits) ARM: gemini: convert to GENERIC_CLOCKEVENTS ARM: EXYNOS: remove CONFIG_MACH_EXYNOS[4, 5]_DT config options ARM: OMAP3: control: add API for setting IVA bootmode ARM: OMAP3: CM/control: move CM scratchpad save to CM driver ARM: OMAP3: McBSP: do not access CM register directly ARM: OMAP3: clock: add API to enable/disable autoidle for a single clock ARM: OMAP2: CM/PM: remove direct register accesses outside CM code MAINTAINERS: Add patterns for DTS files for AT91 ARM: at91: remove init_machine() as default is suitable ARM: at91/dt: split sama5d3 peripheral definitions ARM: at91/dt: split sam9x5 peripheral definitions ARM: Remove temporary sched_clock.h header ARM: clps711x: Use linux/sched_clock.h MAINTAINERS: Add DTS files to patterns for Samsung platform ARM: EXYNOS: remove unnecessary header inclusions from exynos4/5 dt machine file ARM: tegra: fix ARCH_TEGRA_114_SOC select sort order clk: nomadik: fix missing __init on nomadik_src_init ARM: drop explicit selection of HAVE_CLK and CLKDEV_LOOKUP ARM: S3C64XX: Kill CONFIG_PLAT_S3C64XX ASoC: samsung: Use CONFIG_ARCH_S3C64XX to check for S3C64XX support ...
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/Makefile4
-rw-r--r--arch/arm/boot/dts/at91sam9g25.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9g35.dtsi1
-rw-r--r--arch/arm/boot/dts/at91sam9x25.dtsi24
-rw-r--r--arch/arm/boot/dts/at91sam9x35.dtsi1
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi67
-rw-r--r--arch/arm/boot/dts/at91sam9x5_macb0.dtsi56
-rw-r--r--arch/arm/boot/dts/at91sam9x5_macb1.dtsi44
-rw-r--r--arch/arm/boot/dts/at91sam9x5_usart3.dtsi51
-rw-r--r--arch/arm/boot/dts/qcom-msm8660-surf.dts (renamed from arch/arm/boot/dts/msm8660-surf.dts)0
-rw-r--r--arch/arm/boot/dts/qcom-msm8960-cdp.dts (renamed from arch/arm/boot/dts/msm8960-cdp.dts)0
-rw-r--r--arch/arm/boot/dts/sama5d3.dtsi203
-rw-r--r--arch/arm/boot/dts/sama5d31.dtsi16
-rw-r--r--arch/arm/boot/dts/sama5d31ek.dts3
-rw-r--r--arch/arm/boot/dts/sama5d33.dtsi14
-rw-r--r--arch/arm/boot/dts/sama5d33ek.dts3
-rw-r--r--arch/arm/boot/dts/sama5d34.dtsi16
-rw-r--r--arch/arm/boot/dts/sama5d34ek.dts3
-rw-r--r--arch/arm/boot/dts/sama5d35.dtsi18
-rw-r--r--arch/arm/boot/dts/sama5d35ek.dts3
-rw-r--r--arch/arm/boot/dts/sama5d3_can.dtsi54
-rw-r--r--arch/arm/boot/dts/sama5d3_emac.dtsi44
-rw-r--r--arch/arm/boot/dts/sama5d3_gmac.dtsi77
-rw-r--r--arch/arm/boot/dts/sama5d3_lcd.dtsi55
-rw-r--r--arch/arm/boot/dts/sama5d3_mci2.dtsi47
-rw-r--r--arch/arm/boot/dts/sama5d3_tcb1.dtsi27
-rw-r--r--arch/arm/boot/dts/sama5d3_uart.dtsi53
-rw-r--r--arch/arm/boot/dts/sama5d3xcm.dtsi1
-rw-r--r--arch/arm/boot/dts/ste-nomadik-stn8815.dtsi12
29 files changed, 599 insertions, 300 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 802720e3e8fd..c485157b0b5b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -103,8 +103,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
103 kirkwood-ts219-6282.dtb \ 103 kirkwood-ts219-6282.dtb \
104 kirkwood-openblocks_a6.dtb 104 kirkwood-openblocks_a6.dtb
105dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb 105dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
106dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \ 106dtb-$(CONFIG_ARCH_MSM) += qcom-msm8660-surf.dtb \
107 msm8960-cdp.dtb 107 qcom-msm8960-cdp.dtb
108dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ 108dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
109 armada-370-mirabox.dtb \ 109 armada-370-mirabox.dtb \
110 armada-370-netgear-rn102.dtb \ 110 armada-370-netgear-rn102.dtb \
diff --git a/arch/arm/boot/dts/at91sam9g25.dtsi b/arch/arm/boot/dts/at91sam9g25.dtsi
index b4ec6fe53fc7..17b879990914 100644
--- a/arch/arm/boot/dts/at91sam9g25.dtsi
+++ b/arch/arm/boot/dts/at91sam9g25.dtsi
@@ -7,6 +7,8 @@
7 */ 7 */
8 8
9#include "at91sam9x5.dtsi" 9#include "at91sam9x5.dtsi"
10#include "at91sam9x5_usart3.dtsi"
11#include "at91sam9x5_macb0.dtsi"
10 12
11/ { 13/ {
12 model = "Atmel AT91SAM9G25 SoC"; 14 model = "Atmel AT91SAM9G25 SoC";
diff --git a/arch/arm/boot/dts/at91sam9g35.dtsi b/arch/arm/boot/dts/at91sam9g35.dtsi
index bebf9f55614b..e35c2fcf8298 100644
--- a/arch/arm/boot/dts/at91sam9g35.dtsi
+++ b/arch/arm/boot/dts/at91sam9g35.dtsi
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include "at91sam9x5.dtsi" 9#include "at91sam9x5.dtsi"
10#include "at91sam9x5_macb0.dtsi"
10 11
11/ { 12/ {
12 model = "Atmel AT91SAM9G35 SoC"; 13 model = "Atmel AT91SAM9G35 SoC";
diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi
index 49e94aba938f..c2554219f7a4 100644
--- a/arch/arm/boot/dts/at91sam9x25.dtsi
+++ b/arch/arm/boot/dts/at91sam9x25.dtsi
@@ -7,6 +7,9 @@
7 */ 7 */
8 8
9#include "at91sam9x5.dtsi" 9#include "at91sam9x5.dtsi"
10#include "at91sam9x5_usart3.dtsi"
11#include "at91sam9x5_macb0.dtsi"
12#include "at91sam9x5_macb1.dtsi"
10 13
11/ { 14/ {
12 model = "Atmel AT91SAM9X25 SoC"; 15 model = "Atmel AT91SAM9X25 SoC";
@@ -22,27 +25,6 @@
22 0x80000000 0xfffd0000 0xb83fffff /* pioC */ 25 0x80000000 0xfffd0000 0xb83fffff /* pioC */
23 0x003fffff 0x003f8000 0x00000000 /* pioD */ 26 0x003fffff 0x003f8000 0x00000000 /* pioD */
24 >; 27 >;
25
26 macb1 {
27 pinctrl_macb1_rmii: macb1_rmii-0 {
28 atmel,pins =
29 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
30 AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
31 AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
32 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
33 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
34 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
35 AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
36 AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
37 AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
38 AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
39 };
40 };
41 };
42
43 macb1: ethernet@f8030000 {
44 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_macb1_rmii>;
46 }; 28 };
47 }; 29 };
48 }; 30 };
diff --git a/arch/arm/boot/dts/at91sam9x35.dtsi b/arch/arm/boot/dts/at91sam9x35.dtsi
index 1a3d525a1f5d..8eac66ce0ab7 100644
--- a/arch/arm/boot/dts/at91sam9x35.dtsi
+++ b/arch/arm/boot/dts/at91sam9x35.dtsi
@@ -7,6 +7,7 @@
7 */ 7 */
8 8
9#include "at91sam9x5.dtsi" 9#include "at91sam9x5.dtsi"
10#include "at91sam9x5_macb0.dtsi"
10 11
11/ { 12/ {
12 model = "Atmel AT91SAM9X35 SoC"; 13 model = "Atmel AT91SAM9X35 SoC";
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index e74dc15efa9d..40267a116c3c 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -206,29 +206,6 @@
206 }; 206 };
207 }; 207 };
208 208
209 usart3 {
210 pinctrl_usart3: usart3-0 {
211 atmel,pins =
212 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
213 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
214 };
215
216 pinctrl_usart3_rts: usart3_rts-0 {
217 atmel,pins =
218 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
219 };
220
221 pinctrl_usart3_cts: usart3_cts-0 {
222 atmel,pins =
223 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
224 };
225
226 pinctrl_usart3_sck: usart3_sck-0 {
227 atmel,pins =
228 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
229 };
230 };
231
232 uart0 { 209 uart0 {
233 pinctrl_uart0: uart0-0 { 210 pinctrl_uart0: uart0-0 {
234 atmel,pins = 211 atmel,pins =
@@ -277,34 +254,6 @@
277 }; 254 };
278 }; 255 };
279 256
280 macb0 {
281 pinctrl_macb0_rmii: macb0_rmii-0 {
282 atmel,pins =
283 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
284 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
285 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
286 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
287 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
288 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
289 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
290 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
291 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
292 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
293 };
294
295 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
296 atmel,pins =
297 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
298 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */
299 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
300 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
301 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
302 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
303 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
304 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
305 };
306 };
307
308 mmc0 { 257 mmc0 {
309 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { 258 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
310 atmel,pins = 259 atmel,pins =
@@ -610,22 +559,6 @@
610 status = "disabled"; 559 status = "disabled";
611 }; 560 };
612 561
613 macb0: ethernet@f802c000 {
614 compatible = "cdns,at32ap7000-macb", "cdns,macb";
615 reg = <0xf802c000 0x100>;
616 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
617 pinctrl-names = "default";
618 pinctrl-0 = <&pinctrl_macb0_rmii>;
619 status = "disabled";
620 };
621
622 macb1: ethernet@f8030000 {
623 compatible = "cdns,at32ap7000-macb", "cdns,macb";
624 reg = <0xf8030000 0x100>;
625 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
626 status = "disabled";
627 };
628
629 i2c0: i2c@f8010000 { 562 i2c0: i2c@f8010000 {
630 compatible = "atmel,at91sam9x5-i2c"; 563 compatible = "atmel,at91sam9x5-i2c";
631 reg = <0xf8010000 0x100>; 564 reg = <0xf8010000 0x100>;
diff --git a/arch/arm/boot/dts/at91sam9x5_macb0.dtsi b/arch/arm/boot/dts/at91sam9x5_macb0.dtsi
new file mode 100644
index 000000000000..55731ffba764
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5_macb0.dtsi
@@ -0,0 +1,56 @@
1/*
2 * at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
3 * Ethernet interface.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pinctrl@fffff400 {
17 macb0 {
18 pinctrl_macb0_rmii: macb0_rmii-0 {
19 atmel,pins =
20 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
21 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
22 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
23 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
24 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
25 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
26 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
27 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
28 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
29 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
30 };
31
32 pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
33 atmel,pins =
34 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
35 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */
36 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
37 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
38 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
39 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
40 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
41 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
42 };
43 };
44 };
45
46 macb0: ethernet@f802c000 {
47 compatible = "cdns,at32ap7000-macb", "cdns,macb";
48 reg = <0xf802c000 0x100>;
49 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_macb0_rmii>;
52 status = "disabled";
53 };
54 };
55 };
56};
diff --git a/arch/arm/boot/dts/at91sam9x5_macb1.dtsi b/arch/arm/boot/dts/at91sam9x5_macb1.dtsi
new file mode 100644
index 000000000000..77425a627a94
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5_macb1.dtsi
@@ -0,0 +1,44 @@
1/*
2 * at91sam9x5_macb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 2
3 * Ethernet interfaces.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pinctrl@fffff400 {
17 macb1 {
18 pinctrl_macb1_rmii: macb1_rmii-0 {
19 atmel,pins =
20 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
21 AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
22 AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
23 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
24 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
25 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
26 AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
27 AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
28 AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
29 AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
30 };
31 };
32 };
33
34 macb1: ethernet@f8030000 {
35 compatible = "cdns,at32ap7000-macb", "cdns,macb";
36 reg = <0xf8030000 0x100>;
37 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_macb1_rmii>;
40 status = "disabled";
41 };
42 };
43 };
44};
diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
new file mode 100644
index 000000000000..2347e9563cef
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
@@ -0,0 +1,51 @@
1/*
2 * at91sam9x5_usart3.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
3 * 4 USART.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pinctrl@fffff400 {
17 usart3 {
18 pinctrl_usart3: usart3-0 {
19 atmel,pins =
20 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
21 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
22 };
23
24 pinctrl_usart3_rts: usart3_rts-0 {
25 atmel,pins =
26 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
27 };
28
29 pinctrl_usart3_cts: usart3_cts-0 {
30 atmel,pins =
31 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
32 };
33
34 pinctrl_usart3_sck: usart3_sck-0 {
35 atmel,pins =
36 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
37 };
38 };
39 };
40
41 usart3: serial@f8028000 {
42 compatible = "atmel,at91sam9260-usart";
43 reg = <0xf8028000 0x200>;
44 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
45 pinctrl-names = "default";
46 pinctrl-0 = <&pinctrl_usart3>;
47 status = "disabled";
48 };
49 };
50 };
51};
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/qcom-msm8660-surf.dts
index 386d42870215..386d42870215 100644
--- a/arch/arm/boot/dts/msm8660-surf.dts
+++ b/arch/arm/boot/dts/qcom-msm8660-surf.dts
diff --git a/arch/arm/boot/dts/msm8960-cdp.dts b/arch/arm/boot/dts/qcom-msm8960-cdp.dts
index 93e9f7e0b7ad..93e9f7e0b7ad 100644
--- a/arch/arm/boot/dts/msm8960-cdp.dts
+++ b/arch/arm/boot/dts/qcom-msm8960-cdp.dts
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index b7f49615120d..5cdaba4cea86 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -31,7 +31,6 @@
31 gpio3 = &pioD; 31 gpio3 = &pioD;
32 gpio4 = &pioE; 32 gpio4 = &pioE;
33 tcb0 = &tcb0; 33 tcb0 = &tcb0;
34 tcb1 = &tcb1;
35 i2c0 = &i2c0; 34 i2c0 = &i2c0;
36 i2c1 = &i2c1; 35 i2c1 = &i2c1;
37 i2c2 = &i2c2; 36 i2c2 = &i2c2;
@@ -105,15 +104,6 @@
105 status = "disabled"; 104 status = "disabled";
106 }; 105 };
107 106
108 can0: can@f000c000 {
109 compatible = "atmel,at91sam9x5-can";
110 reg = <0xf000c000 0x300>;
111 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_can0_rx_tx>;
114 status = "disabled";
115 };
116
117 tcb0: timer@f0010000 { 107 tcb0: timer@f0010000 {
118 compatible = "atmel,at91sam9x5-tcb"; 108 compatible = "atmel,at91sam9x5-tcb";
119 reg = <0xf0010000 0x100>; 109 reg = <0xf0010000 0x100>;
@@ -166,15 +156,6 @@
166 status = "disabled"; 156 status = "disabled";
167 }; 157 };
168 158
169 macb0: ethernet@f0028000 {
170 compatible = "cdns,pc302-gem", "cdns,gem";
171 reg = <0xf0028000 0x100>;
172 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
175 status = "disabled";
176 };
177
178 isi: isi@f0034000 { 159 isi: isi@f0034000 {
179 compatible = "atmel,at91sam9g45-isi"; 160 compatible = "atmel,at91sam9g45-isi";
180 reg = <0xf0034000 0x4000>; 161 reg = <0xf0034000 0x4000>;
@@ -195,19 +176,6 @@
195 #size-cells = <0>; 176 #size-cells = <0>;
196 }; 177 };
197 178
198 mmc2: mmc@f8004000 {
199 compatible = "atmel,hsmci";
200 reg = <0xf8004000 0x600>;
201 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
202 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(1)>;
203 dma-names = "rxtx";
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
206 status = "disabled";
207 #address-cells = <1>;
208 #size-cells = <0>;
209 };
210
211 spi1: spi@f8008000 { 179 spi1: spi@f8008000 {
212 #address-cells = <1>; 180 #address-cells = <1>;
213 #size-cells = <0>; 181 #size-cells = <0>;
@@ -231,20 +199,6 @@
231 status = "disabled"; 199 status = "disabled";
232 }; 200 };
233 201
234 can1: can@f8010000 {
235 compatible = "atmel,at91sam9x5-can";
236 reg = <0xf8010000 0x300>;
237 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
238 pinctrl-names = "default";
239 pinctrl-0 = <&pinctrl_can1_rx_tx>;
240 };
241
242 tcb1: timer@f8014000 {
243 compatible = "atmel,at91sam9x5-tcb";
244 reg = <0xf8014000 0x100>;
245 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
246 };
247
248 adc0: adc@f8018000 { 202 adc0: adc@f8018000 {
249 compatible = "atmel,at91sam9260-adc"; 203 compatible = "atmel,at91sam9260-adc";
250 reg = <0xf8018000 0x100>; 204 reg = <0xf8018000 0x100>;
@@ -341,15 +295,6 @@
341 status = "disabled"; 295 status = "disabled";
342 }; 296 };
343 297
344 macb1: ethernet@f802c000 {
345 compatible = "cdns,at32ap7000-macb", "cdns,macb";
346 reg = <0xf802c000 0x100>;
347 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
348 pinctrl-names = "default";
349 pinctrl-0 = <&pinctrl_macb1_rmii>;
350 status = "disabled";
351 };
352
353 sha@f8034000 { 298 sha@f8034000 {
354 compatible = "atmel,sam9g46-sha"; 299 compatible = "atmel,sam9g46-sha";
355 reg = <0xf8034000 0x100>; 300 reg = <0xf8034000 0x100>;
@@ -474,22 +419,6 @@
474 }; 419 };
475 }; 420 };
476 421
477 can0 {
478 pinctrl_can0_rx_tx: can0_rx_tx {
479 atmel,pins =
480 <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
481 AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
482 };
483 };
484
485 can1 {
486 pinctrl_can1_rx_tx: can1_rx_tx {
487 atmel,pins =
488 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
489 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
490 };
491 };
492
493 dbgu { 422 dbgu {
494 pinctrl_dbgu: dbgu-0 { 423 pinctrl_dbgu: dbgu-0 {
495 atmel,pins = 424 atmel,pins =
@@ -537,107 +466,6 @@
537 }; 466 };
538 }; 467 };
539 468
540 lcd {
541 pinctrl_lcd: lcd-0 {
542 atmel,pins =
543 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */
544 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */
545 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */
546 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */
547 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */
548 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */
549 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */
550 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */
551 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */
552 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */
553 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */
554 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */
555 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */
556 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */
557 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */
558 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */
559 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */
560 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */
561 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */
562 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */
563 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */
564 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */
565 AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */
566 AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */
567 AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */
568 AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */
569 AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */
570 AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */
571 AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */
572 AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */
573 };
574 };
575
576 macb0 {
577 pinctrl_macb0_data_rgmii: macb0_data_rgmii {
578 atmel,pins =
579 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */
580 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */
581 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */
582 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */
583 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */
584 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */
585 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */
586 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */
587 };
588 pinctrl_macb0_data_gmii: macb0_data_gmii {
589 atmel,pins =
590 <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */
591 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
592 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
593 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
594 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
595 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */
596 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */
597 AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
598 };
599 pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
600 atmel,pins =
601 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */
602 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
603 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
604 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
605 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
606 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
607 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
608 };
609 pinctrl_macb0_signal_gmii: macb0_signal_gmii {
610 atmel,pins =
611 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
612 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */
613 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
614 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */
615 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
616 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */
617 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */
618 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
619 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
620 AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
621 };
622
623 };
624
625 macb1 {
626 pinctrl_macb1_rmii: macb1_rmii-0 {
627 atmel,pins =
628 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */
629 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */
630 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */
631 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */
632 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */
633 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */
634 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */
635 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */
636 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */
637 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */
638 };
639 };
640
641 mmc0 { 469 mmc0 {
642 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { 470 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
643 atmel,pins = 471 atmel,pins =
@@ -675,21 +503,6 @@
675 }; 503 };
676 }; 504 };
677 505
678 mmc2 {
679 pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 {
680 atmel,pins =
681 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */
682 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */
683 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */
684 };
685 pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
686 atmel,pins =
687 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
688 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
689 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
690 };
691 };
692
693 nand0 { 506 nand0 {
694 pinctrl_nand0_ale_cle: nand0_ale_cle-0 { 507 pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
695 atmel,pins = 508 atmel,pins =
@@ -748,22 +561,6 @@
748 }; 561 };
749 }; 562 };
750 563
751 uart0 {
752 pinctrl_uart0: uart0-0 {
753 atmel,pins =
754 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
755 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
756 };
757 };
758
759 uart1 {
760 pinctrl_uart1: uart1-0 {
761 atmel,pins =
762 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
763 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
764 };
765 };
766
767 usart0 { 564 usart0 {
768 pinctrl_usart0: usart0-0 { 565 pinctrl_usart0: usart0-0 {
769 atmel,pins = 566 atmel,pins =
diff --git a/arch/arm/boot/dts/sama5d31.dtsi b/arch/arm/boot/dts/sama5d31.dtsi
new file mode 100644
index 000000000000..7997dc9863ed
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d31.dtsi
@@ -0,0 +1,16 @@
1/*
2 * sama5d31.dtsi - Device Tree Include file for SAMA5D31 SoC
3 *
4 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
5 *
6 * Licensed under GPLv2 or later.
7 */
8#include "sama5d3.dtsi"
9#include "sama5d3_lcd.dtsi"
10#include "sama5d3_emac.dtsi"
11#include "sama5d3_mci2.dtsi"
12#include "sama5d3_uart.dtsi"
13
14/ {
15 compatible = "atmel,samad31", "atmel,sama5d3", "atmel,sama5";
16};
diff --git a/arch/arm/boot/dts/sama5d31ek.dts b/arch/arm/boot/dts/sama5d31ek.dts
index 027bac7510b6..04eec0dfcf7d 100644
--- a/arch/arm/boot/dts/sama5d31ek.dts
+++ b/arch/arm/boot/dts/sama5d31ek.dts
@@ -7,12 +7,13 @@
7 * Licensed under GPLv2 or later. 7 * Licensed under GPLv2 or later.
8 */ 8 */
9/dts-v1/; 9/dts-v1/;
10#include "sama5d31.dtsi"
10#include "sama5d3xmb.dtsi" 11#include "sama5d3xmb.dtsi"
11#include "sama5d3xdm.dtsi" 12#include "sama5d3xdm.dtsi"
12 13
13/ { 14/ {
14 model = "Atmel SAMA5D31-EK"; 15 model = "Atmel SAMA5D31-EK";
15 compatible = "atmel,sama5d31ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; 16 compatible = "atmel,sama5d31ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
16 17
17 ahb { 18 ahb {
18 apb { 19 apb {
diff --git a/arch/arm/boot/dts/sama5d33.dtsi b/arch/arm/boot/dts/sama5d33.dtsi
new file mode 100644
index 000000000000..39f832253caf
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d33.dtsi
@@ -0,0 +1,14 @@
1/*
2 * sama5d33.dtsi - Device Tree Include file for SAMA5D33 SoC
3 *
4 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
5 *
6 * Licensed under GPLv2 or later.
7 */
8#include "sama5d3.dtsi"
9#include "sama5d3_lcd.dtsi"
10#include "sama5d3_gmac.dtsi"
11
12/ {
13 compatible = "atmel,samad33", "atmel,sama5d3", "atmel,sama5";
14};
diff --git a/arch/arm/boot/dts/sama5d33ek.dts b/arch/arm/boot/dts/sama5d33ek.dts
index 99bd0c8e0471..cbd6a3ff1545 100644
--- a/arch/arm/boot/dts/sama5d33ek.dts
+++ b/arch/arm/boot/dts/sama5d33ek.dts
@@ -7,12 +7,13 @@
7 * Licensed under GPLv2 or later. 7 * Licensed under GPLv2 or later.
8 */ 8 */
9/dts-v1/; 9/dts-v1/;
10#include "sama5d33.dtsi"
10#include "sama5d3xmb.dtsi" 11#include "sama5d3xmb.dtsi"
11#include "sama5d3xdm.dtsi" 12#include "sama5d3xdm.dtsi"
12 13
13/ { 14/ {
14 model = "Atmel SAMA5D33-EK"; 15 model = "Atmel SAMA5D33-EK";
15 compatible = "atmel,sama5d33ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; 16 compatible = "atmel,sama5d33ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d33", "atmel,sama5d3", "atmel,sama5";
16 17
17 ahb { 18 ahb {
18 apb { 19 apb {
diff --git a/arch/arm/boot/dts/sama5d34.dtsi b/arch/arm/boot/dts/sama5d34.dtsi
new file mode 100644
index 000000000000..89cda2c0da39
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d34.dtsi
@@ -0,0 +1,16 @@
1/*
2 * sama5d34.dtsi - Device Tree Include file for SAMA5D34 SoC
3 *
4 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
5 *
6 * Licensed under GPLv2 or later.
7 */
8#include "sama5d3.dtsi"
9#include "sama5d3_lcd.dtsi"
10#include "sama5d3_gmac.dtsi"
11#include "sama5d3_can.dtsi"
12#include "sama5d3_mci2.dtsi"
13
14/ {
15 compatible = "atmel,samad34", "atmel,sama5d3", "atmel,sama5";
16};
diff --git a/arch/arm/boot/dts/sama5d34ek.dts b/arch/arm/boot/dts/sama5d34ek.dts
index fb8ee11cf282..878aa164275a 100644
--- a/arch/arm/boot/dts/sama5d34ek.dts
+++ b/arch/arm/boot/dts/sama5d34ek.dts
@@ -7,12 +7,13 @@
7 * Licensed under GPLv2 or later. 7 * Licensed under GPLv2 or later.
8 */ 8 */
9/dts-v1/; 9/dts-v1/;
10#include "sama5d34.dtsi"
10#include "sama5d3xmb.dtsi" 11#include "sama5d3xmb.dtsi"
11#include "sama5d3xdm.dtsi" 12#include "sama5d3xdm.dtsi"
12 13
13/ { 14/ {
14 model = "Atmel SAMA5D34-EK"; 15 model = "Atmel SAMA5D34-EK";
15 compatible = "atmel,sama5d34ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; 16 compatible = "atmel,sama5d34ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d34", "atmel,sama5d3", "atmel,sama5";
16 17
17 ahb { 18 ahb {
18 apb { 19 apb {
diff --git a/arch/arm/boot/dts/sama5d35.dtsi b/arch/arm/boot/dts/sama5d35.dtsi
new file mode 100644
index 000000000000..d20cd71b5f0e
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d35.dtsi
@@ -0,0 +1,18 @@
1/*
2 * sama5d35.dtsi - Device Tree Include file for SAMA5D35 SoC
3 *
4 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
5 *
6 * Licensed under GPLv2 or later.
7 */
8#include "sama5d3.dtsi"
9#include "sama5d3_gmac.dtsi"
10#include "sama5d3_emac.dtsi"
11#include "sama5d3_can.dtsi"
12#include "sama5d3_mci2.dtsi"
13#include "sama5d3_uart.dtsi"
14#include "sama5d3_tcb1.dtsi"
15
16/ {
17 compatible = "atmel,samad35", "atmel,sama5d3", "atmel,sama5";
18};
diff --git a/arch/arm/boot/dts/sama5d35ek.dts b/arch/arm/boot/dts/sama5d35ek.dts
index 509a53d9cc7b..9089c7c6cea8 100644
--- a/arch/arm/boot/dts/sama5d35ek.dts
+++ b/arch/arm/boot/dts/sama5d35ek.dts
@@ -7,11 +7,12 @@
7 * Licensed under GPLv2 or later. 7 * Licensed under GPLv2 or later.
8 */ 8 */
9/dts-v1/; 9/dts-v1/;
10#include "sama5d35.dtsi"
10#include "sama5d3xmb.dtsi" 11#include "sama5d3xmb.dtsi"
11 12
12/ { 13/ {
13 model = "Atmel SAMA5D35-EK"; 14 model = "Atmel SAMA5D35-EK";
14 compatible = "atmel,sama5d35ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; 15 compatible = "atmel,sama5d35ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d35", "atmel,sama5d3", "atmel,sama5";
15 16
16 ahb { 17 ahb {
17 apb { 18 apb {
diff --git a/arch/arm/boot/dts/sama5d3_can.dtsi b/arch/arm/boot/dts/sama5d3_can.dtsi
new file mode 100644
index 000000000000..8ed3260cef66
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d3_can.dtsi
@@ -0,0 +1,54 @@
1/*
2 * at91sama5d3_can.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
3 * CAN support
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pinctrl@fffff200 {
17 can0 {
18 pinctrl_can0_rx_tx: can0_rx_tx {
19 atmel,pins =
20 <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
21 AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
22 };
23 };
24
25 can1 {
26 pinctrl_can1_rx_tx: can1_rx_tx {
27 atmel,pins =
28 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
29 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
30 };
31 };
32
33 };
34
35 can0: can@f000c000 {
36 compatible = "atmel,at91sam9x5-can";
37 reg = <0xf000c000 0x300>;
38 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
39 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_can0_rx_tx>;
41 status = "disabled";
42 };
43
44 can1: can@f8010000 {
45 compatible = "atmel,at91sam9x5-can";
46 reg = <0xf8010000 0x300>;
47 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
48 pinctrl-names = "default";
49 pinctrl-0 = <&pinctrl_can1_rx_tx>;
50 status = "disabled";
51 };
52 };
53 };
54};
diff --git a/arch/arm/boot/dts/sama5d3_emac.dtsi b/arch/arm/boot/dts/sama5d3_emac.dtsi
new file mode 100644
index 000000000000..4d4f351f1f9f
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d3_emac.dtsi
@@ -0,0 +1,44 @@
1/*
2 * at91sama5d3_emac.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
3 * Ethernet.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pinctrl@fffff200 {
17 macb1 {
18 pinctrl_macb1_rmii: macb1_rmii-0 {
19 atmel,pins =
20 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */
21 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */
22 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */
23 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */
24 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */
25 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */
26 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */
27 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */
28 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */
29 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */
30 };
31 };
32 };
33
34 macb1: ethernet@f802c000 {
35 compatible = "cdns,at32ap7000-macb", "cdns,macb";
36 reg = <0xf802c000 0x100>;
37 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_macb1_rmii>;
40 status = "disabled";
41 };
42 };
43 };
44};
diff --git a/arch/arm/boot/dts/sama5d3_gmac.dtsi b/arch/arm/boot/dts/sama5d3_gmac.dtsi
new file mode 100644
index 000000000000..0ba8be30ccd8
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d3_gmac.dtsi
@@ -0,0 +1,77 @@
1/*
2 * at91sama5d3_gmac.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
3 * Gigabit Ethernet.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pinctrl@fffff200 {
17 macb0 {
18 pinctrl_macb0_data_rgmii: macb0_data_rgmii {
19 atmel,pins =
20 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */
21 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */
22 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */
23 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */
24 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */
25 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */
26 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */
27 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */
28 };
29 pinctrl_macb0_data_gmii: macb0_data_gmii {
30 atmel,pins =
31 <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */
32 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
33 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
34 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
35 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
36 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */
37 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */
38 AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
39 };
40 pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
41 atmel,pins =
42 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */
43 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
44 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
45 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
46 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
47 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
48 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
49 };
50 pinctrl_macb0_signal_gmii: macb0_signal_gmii {
51 atmel,pins =
52 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
53 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */
54 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
55 AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */
56 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
57 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */
58 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */
59 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
60 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
61 AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
62 };
63
64 };
65 };
66
67 macb0: ethernet@f0028000 {
68 compatible = "cdns,pc302-gem", "cdns,gem";
69 reg = <0xf0028000 0x100>;
70 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
73 status = "disabled";
74 };
75 };
76 };
77};
diff --git a/arch/arm/boot/dts/sama5d3_lcd.dtsi b/arch/arm/boot/dts/sama5d3_lcd.dtsi
new file mode 100644
index 000000000000..01f52a79f8ba
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d3_lcd.dtsi
@@ -0,0 +1,55 @@
1/*
2 * at91sama5d3_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
3 * LCD support
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pinctrl@fffff200 {
17 lcd {
18 pinctrl_lcd: lcd-0 {
19 atmel,pins =
20 <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */
21 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */
22 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */
23 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */
24 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */
25 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */
26 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */
27 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */
28 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */
29 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */
30 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */
31 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */
32 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */
33 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */
34 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */
35 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */
36 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */
37 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */
38 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */
39 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */
40 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */
41 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */
42 AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */
43 AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */
44 AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */
45 AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */
46 AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */
47 AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */
48 AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */
49 AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */
50 };
51 };
52 };
53 };
54 };
55};
diff --git a/arch/arm/boot/dts/sama5d3_mci2.dtsi b/arch/arm/boot/dts/sama5d3_mci2.dtsi
new file mode 100644
index 000000000000..38e88e39e551
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d3_mci2.dtsi
@@ -0,0 +1,47 @@
1/*
2 * at91sama5d3_mci2.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
3 * 3 MMC ports
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pinctrl@fffff200 {
17 mmc2 {
18 pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 {
19 atmel,pins =
20 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */
21 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */
22 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */
23 };
24 pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
25 atmel,pins =
26 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
27 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
28 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
29 };
30 };
31 };
32
33 mmc2: mmc@f8004000 {
34 compatible = "atmel,hsmci";
35 reg = <0xf8004000 0x600>;
36 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
37 dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(1)>;
38 dma-names = "rxtx";
39 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>;
41 status = "disabled";
42 #address-cells = <1>;
43 #size-cells = <0>;
44 };
45 };
46 };
47};
diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
new file mode 100644
index 000000000000..5264bb4a6998
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi
@@ -0,0 +1,27 @@
1/*
2 * at91sama5d3_tcb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
3 * 2 TC blocks.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 aliases {
15 tcb1 = &tcb1;
16 };
17
18 ahb {
19 apb {
20 tcb1: timer@f8014000 {
21 compatible = "atmel,at91sam9x5-tcb";
22 reg = <0xf8014000 0x100>;
23 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
24 };
25 };
26 };
27};
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
new file mode 100644
index 000000000000..98fcb2d57446
--- /dev/null
+++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
@@ -0,0 +1,53 @@
1/*
2 * at91sama5d3_uart.dtsi - Device Tree Include file for AT91SAM9x5 SoC with
3 * UART support
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pinctrl@fffff200 {
17 uart0 {
18 pinctrl_uart0: uart0-0 {
19 atmel,pins =
20 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
21 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
22 };
23 };
24
25 uart1 {
26 pinctrl_uart1: uart1-0 {
27 atmel,pins =
28 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
29 AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
30 };
31 };
32 };
33
34 uart0: serial@f0024000 {
35 compatible = "atmel,at91sam9260-usart";
36 reg = <0xf0024000 0x200>;
37 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_uart0>;
40 status = "disabled";
41 };
42
43 uart1: serial@f8028000 {
44 compatible = "atmel,at91sam9260-usart";
45 reg = <0xf8028000 0x200>;
46 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_uart1>;
49 status = "disabled";
50 };
51 };
52 };
53};
diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index 31ed9e3bb649..726a0f35100c 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -6,7 +6,6 @@
6 * 6 *
7 * Licensed under GPLv2 or later. 7 * Licensed under GPLv2 or later.
8 */ 8 */
9#include "sama5d3.dtsi"
10 9
11/ { 10/ {
12 compatible = "atmel,samad3xcm", "atmel,sama5d3", "atmel,sama5"; 11 compatible = "atmel,samad3xcm", "atmel,sama5d3", "atmel,sama5";
diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
index 9169d3025f39..79425e3836ce 100644
--- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
+++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
@@ -653,6 +653,7 @@
653 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; 653 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
654 clocks = <&hclksmc>; 654 clocks = <&hclksmc>;
655 status = "okay"; 655 status = "okay";
656 timings = /bits/ 8 <0 0 0 0x10 0x0a 0>;
656 657
657 partition@0 { 658 partition@0 {
658 label = "X-Loader(NAND)"; 659 label = "X-Loader(NAND)";
@@ -707,8 +708,14 @@
707 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>; 708 pinctrl-0 = <&i2c0_default_mux>, <&i2c0_default_mode>;
708 709
709 stw4811@2d { 710 stw4811@2d {
710 compatible = "st,stw4811"; 711 compatible = "st,stw4811";
711 reg = <0x2d>; 712 reg = <0x2d>;
713 vmmc_regulator: vmmc {
714 compatible = "st,stw481x-vmmc";
715 regulator-name = "VMMC";
716 regulator-min-microvolt = <1800000>;
717 regulator-max-microvolt = <3300000>;
718 };
712 }; 719 };
713 }; 720 };
714 721
@@ -839,6 +846,7 @@
839 cd-inverted; 846 cd-inverted;
840 pinctrl-names = "default"; 847 pinctrl-names = "default";
841 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>; 848 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>;
849 vmmc-supply = <&vmmc_regulator>;
842 }; 850 };
843 }; 851 };
844}; 852};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-20 21:05:26 -0500