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authorTony Prisk <linux@prisktech.co.nz>2013-05-10 01:44:58 -0400
committerTony Prisk <linux@prisktech.co.nz>2013-05-12 04:31:15 -0400
commit9e7b6d3eda8551912b0cf9507ca5f489a476d522 (patch)
tree668e16d24fbdde20ce575218bd2a175f7bf4e182 /arch/arm/boot/dts/wm8850.dtsi
parent5c2b0a8531f594db82abc29e786b4c2d38fa298b (diff)
dts: vt8500: Add ARM, AHB, APB and DDR clock nodes to SoC files
Add support for the ARM, AHB, APB and DDR clocks found on the WM8505, WM8650, WM8750 and WM8850 SoCs. These clocks are gateable, but the enable part of the clock definition is left out as there are no users for these clocks, and we don't want them being disabled at boot, but it does provide users the ability to check the current rate of these clocks. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Diffstat (limited to 'arch/arm/boot/dts/wm8850.dtsi')
-rw-r--r--arch/arm/boot/dts/wm8850.dtsi28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
index 59aaad98f544..1f49f54c38d2 100644
--- a/arch/arm/boot/dts/wm8850.dtsi
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -130,6 +130,34 @@
130 reg = <0x218>; 130 reg = <0x218>;
131 }; 131 };
132 132
133 clkarm: arm {
134 #clock-cells = <0>;
135 compatible = "via,vt8500-device-clock";
136 clocks = <&plla>;
137 divisor-reg = <0x300>;
138 };
139
140 clkahb: ahb {
141 #clock-cells = <0>;
142 compatible = "via,vt8500-device-clock";
143 clocks = <&pllb>;
144 divisor-reg = <0x304>;
145 };
146
147 clkapb: apb {
148 #clock-cells = <0>;
149 compatible = "via,vt8500-device-clock";
150 clocks = <&pllb>;
151 divisor-reg = <0x320>;
152 };
153
154 clkddr: ddr {
155 #clock-cells = <0>;
156 compatible = "via,vt8500-device-clock";
157 clocks = <&plld>;
158 divisor-reg = <0x310>;
159 };
160
133 clkuart0: uart0 { 161 clkuart0: uart0 {
134 #clock-cells = <0>; 162 #clock-cells = <0>;
135 compatible = "via,vt8500-device-clock"; 163 compatible = "via,vt8500-device-clock";