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authorTony Prisk <linux@prisktech.co.nz>2013-05-08 15:35:13 -0400
committerTony Prisk <linux@prisktech.co.nz>2013-05-12 04:31:13 -0400
commit7d4c6f3c5fdb216dfd36573d117eff602146cdcd (patch)
treea5e1ad0391d313df383a300cf89721d2470c5771 /arch/arm/boot/dts/wm8850.dtsi
parent55954f8522cf108e8c894130b2656516b9ae6991 (diff)
dts: clk: vt8500: Update SoC dtsi to use WM8850 PLL
clocks Change the WM8850 SoC dtsi to use the new wm8850 specific PLL clock binding. Previously, the WM8850 used the wm8750 pll clock which is actually different to the wm8850 pll clock. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Diffstat (limited to 'arch/arm/boot/dts/wm8850.dtsi')
-rw-r--r--arch/arm/boot/dts/wm8850.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
index fc60e3204589..9239c0a3aeb7 100644
--- a/arch/arm/boot/dts/wm8850.dtsi
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -83,14 +83,14 @@
83 83
84 plla: plla { 84 plla: plla {
85 #clock-cells = <0>; 85 #clock-cells = <0>;
86 compatible = "wm,wm8750-pll-clock"; 86 compatible = "wm,wm8850-pll-clock";
87 clocks = <&ref25>; 87 clocks = <&ref25>;
88 reg = <0x200>; 88 reg = <0x200>;
89 }; 89 };
90 90
91 pllb: pllb { 91 pllb: pllb {
92 #clock-cells = <0>; 92 #clock-cells = <0>;
93 compatible = "wm,wm8750-pll-clock"; 93 compatible = "wm,wm8850-pll-clock";
94 clocks = <&ref25>; 94 clocks = <&ref25>;
95 reg = <0x204>; 95 reg = <0x204>;
96 }; 96 };