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authorStephen Warren <swarren@nvidia.com>2013-06-13 16:59:53 -0400
committerShawn Guo <shawn.guo@linaro.org>2013-06-17 04:04:34 -0400
commit36af8f3e55be892dc334c34b9157ed571e69e7ea (patch)
treef7668734f11bc38cc8e0027256552098d88ccced /arch/arm/boot/dts/vf610.dtsi
parent77b38fc36c5dc6f99d1db0a3c216724e53e5e257 (diff)
ARM: mxc: fix gpio-ranges for VF610
The gpio-ranges properties in vf610.dtsi were written according to an older version of the GPIO bindings. Unfortunately, these were changed incompatibly in commit 86853c8 "gpio: add gpio offset in gpio range cells property". This patch adds the missing required extra cell in each gpio-ranges property. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/vf610.dtsi')
-rw-r--r--arch/arm/boot/dts/vf610.dtsi12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 659d845b8600..e1eb7dadda80 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -162,7 +162,7 @@
162 iomuxc: iomuxc@40048000 { 162 iomuxc: iomuxc@40048000 {
163 compatible = "fsl,vf610-iomuxc"; 163 compatible = "fsl,vf610-iomuxc";
164 reg = <0x40048000 0x1000>; 164 reg = <0x40048000 0x1000>;
165 #gpio-range-cells = <2>; 165 #gpio-range-cells = <3>;
166 166
167 /* functions and groups pins */ 167 /* functions and groups pins */
168 168
@@ -343,7 +343,7 @@
343 #gpio-cells = <2>; 343 #gpio-cells = <2>;
344 interrupt-controller; 344 interrupt-controller;
345 #interrupt-cells = <2>; 345 #interrupt-cells = <2>;
346 gpio-ranges = <&iomuxc 0 32>; 346 gpio-ranges = <&iomuxc 0 0 32>;
347 }; 347 };
348 348
349 gpio2: gpio@4004a000 { 349 gpio2: gpio@4004a000 {
@@ -354,7 +354,7 @@
354 #gpio-cells = <2>; 354 #gpio-cells = <2>;
355 interrupt-controller; 355 interrupt-controller;
356 #interrupt-cells = <2>; 356 #interrupt-cells = <2>;
357 gpio-ranges = <&iomuxc 32 32>; 357 gpio-ranges = <&iomuxc 0 32 32>;
358 }; 358 };
359 359
360 gpio3: gpio@4004b000 { 360 gpio3: gpio@4004b000 {
@@ -365,7 +365,7 @@
365 #gpio-cells = <2>; 365 #gpio-cells = <2>;
366 interrupt-controller; 366 interrupt-controller;
367 #interrupt-cells = <2>; 367 #interrupt-cells = <2>;
368 gpio-ranges = <&iomuxc 64 32>; 368 gpio-ranges = <&iomuxc 0 64 32>;
369 }; 369 };
370 370
371 gpio4: gpio@4004c000 { 371 gpio4: gpio@4004c000 {
@@ -376,7 +376,7 @@
376 #gpio-cells = <2>; 376 #gpio-cells = <2>;
377 interrupt-controller; 377 interrupt-controller;
378 #interrupt-cells = <2>; 378 #interrupt-cells = <2>;
379 gpio-ranges = <&iomuxc 96 32>; 379 gpio-ranges = <&iomuxc 0 96 32>;
380 }; 380 };
381 381
382 gpio5: gpio@4004d000 { 382 gpio5: gpio@4004d000 {
@@ -387,7 +387,7 @@
387 #gpio-cells = <2>; 387 #gpio-cells = <2>;
388 interrupt-controller; 388 interrupt-controller;
389 #interrupt-cells = <2>; 389 #interrupt-cells = <2>;
390 gpio-ranges = <&iomuxc 128 7>; 390 gpio-ranges = <&iomuxc 0 128 7>;
391 }; 391 };
392 392
393 anatop@40050000 { 393 anatop@40050000 {