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authorHuang Shijie <b32955@freescale.com>2013-12-25 01:19:27 -0500
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 08:33:39 -0500
commit2bc88b1b3ab0db1c807a3dcdbd21e68b2d9ab005 (patch)
tree9778a9641f380c8edee751a782b91976b140297b /arch/arm/boot/dts/vf610.dtsi
parent4e05a7afba58e0fe6ee6275519eeadf09765b0e7 (diff)
ARM: dts: vf610: use the interrupt macros
This patch uses the IRQ_TYPE_LEVEL_HIGH/IRQ_TYPE_NONE to replace the hardcode. [shawn.guo: While at it, we also fix the typo in uart0 interrupts property, where the 0x00 should 0x04. Hense, it should also be IRQ_TYPE_LEVEL_HIGH just like other UART instances.] Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/vf610.dtsi')
-rw-r--r--arch/arm/boot/dts/vf610.dtsi37
1 files changed, 19 insertions, 18 deletions
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index 183943e25ef8..107e2c07dd47 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -10,6 +10,7 @@
10#include "skeleton.dtsi" 10#include "skeleton.dtsi"
11#include "vf610-pinfunc.h" 11#include "vf610-pinfunc.h"
12#include <dt-bindings/clock/vf610-clock.h> 12#include <dt-bindings/clock/vf610-clock.h>
13#include <dt-bindings/interrupt-controller/irq.h>
13 14
14/ { 15/ {
15 aliases { 16 aliases {
@@ -90,7 +91,7 @@
90 uart0: serial@40027000 { 91 uart0: serial@40027000 {
91 compatible = "fsl,vf610-lpuart"; 92 compatible = "fsl,vf610-lpuart";
92 reg = <0x40027000 0x1000>; 93 reg = <0x40027000 0x1000>;
93 interrupts = <0 61 0x00>; 94 interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
94 clocks = <&clks VF610_CLK_UART0>; 95 clocks = <&clks VF610_CLK_UART0>;
95 clock-names = "ipg"; 96 clock-names = "ipg";
96 status = "disabled"; 97 status = "disabled";
@@ -99,7 +100,7 @@
99 uart1: serial@40028000 { 100 uart1: serial@40028000 {
100 compatible = "fsl,vf610-lpuart"; 101 compatible = "fsl,vf610-lpuart";
101 reg = <0x40028000 0x1000>; 102 reg = <0x40028000 0x1000>;
102 interrupts = <0 62 0x04>; 103 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
103 clocks = <&clks VF610_CLK_UART1>; 104 clocks = <&clks VF610_CLK_UART1>;
104 clock-names = "ipg"; 105 clock-names = "ipg";
105 status = "disabled"; 106 status = "disabled";
@@ -108,7 +109,7 @@
108 uart2: serial@40029000 { 109 uart2: serial@40029000 {
109 compatible = "fsl,vf610-lpuart"; 110 compatible = "fsl,vf610-lpuart";
110 reg = <0x40029000 0x1000>; 111 reg = <0x40029000 0x1000>;
111 interrupts = <0 63 0x04>; 112 interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
112 clocks = <&clks VF610_CLK_UART2>; 113 clocks = <&clks VF610_CLK_UART2>;
113 clock-names = "ipg"; 114 clock-names = "ipg";
114 status = "disabled"; 115 status = "disabled";
@@ -117,7 +118,7 @@
117 uart3: serial@4002a000 { 118 uart3: serial@4002a000 {
118 compatible = "fsl,vf610-lpuart"; 119 compatible = "fsl,vf610-lpuart";
119 reg = <0x4002a000 0x1000>; 120 reg = <0x4002a000 0x1000>;
120 interrupts = <0 64 0x04>; 121 interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
121 clocks = <&clks VF610_CLK_UART3>; 122 clocks = <&clks VF610_CLK_UART3>;
122 clock-names = "ipg"; 123 clock-names = "ipg";
123 status = "disabled"; 124 status = "disabled";
@@ -128,7 +129,7 @@
128 #size-cells = <0>; 129 #size-cells = <0>;
129 compatible = "fsl,vf610-dspi"; 130 compatible = "fsl,vf610-dspi";
130 reg = <0x4002c000 0x1000>; 131 reg = <0x4002c000 0x1000>;
131 interrupts = <0 67 0x04>; 132 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
132 clocks = <&clks VF610_CLK_DSPI0>; 133 clocks = <&clks VF610_CLK_DSPI0>;
133 clock-names = "dspi"; 134 clock-names = "dspi";
134 spi-num-chipselects = <5>; 135 spi-num-chipselects = <5>;
@@ -138,7 +139,7 @@
138 sai2: sai@40031000 { 139 sai2: sai@40031000 {
139 compatible = "fsl,vf610-sai"; 140 compatible = "fsl,vf610-sai";
140 reg = <0x40031000 0x1000>; 141 reg = <0x40031000 0x1000>;
141 interrupts = <0 86 0x04>; 142 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
142 clocks = <&clks VF610_CLK_SAI2>; 143 clocks = <&clks VF610_CLK_SAI2>;
143 clock-names = "sai"; 144 clock-names = "sai";
144 status = "disabled"; 145 status = "disabled";
@@ -147,7 +148,7 @@
147 pit: pit@40037000 { 148 pit: pit@40037000 {
148 compatible = "fsl,vf610-pit"; 149 compatible = "fsl,vf610-pit";
149 reg = <0x40037000 0x1000>; 150 reg = <0x40037000 0x1000>;
150 interrupts = <0 39 0x04>; 151 interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
151 clocks = <&clks VF610_CLK_PIT>; 152 clocks = <&clks VF610_CLK_PIT>;
152 clock-names = "pit"; 153 clock-names = "pit";
153 }; 154 };
@@ -164,7 +165,7 @@
164 #size-cells = <0>; 165 #size-cells = <0>;
165 compatible = "fsl,vf610-qspi"; 166 compatible = "fsl,vf610-qspi";
166 reg = <0x40044000 0x1000>; 167 reg = <0x40044000 0x1000>;
167 interrupts = <0 24 0x04>; 168 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
168 clocks = <&clks VF610_CLK_QSPI0_EN>, 169 clocks = <&clks VF610_CLK_QSPI0_EN>,
169 <&clks VF610_CLK_QSPI0>; 170 <&clks VF610_CLK_QSPI0>;
170 clock-names = "qspi_en", "qspi"; 171 clock-names = "qspi_en", "qspi";
@@ -180,7 +181,7 @@
180 gpio1: gpio@40049000 { 181 gpio1: gpio@40049000 {
181 compatible = "fsl,vf610-gpio"; 182 compatible = "fsl,vf610-gpio";
182 reg = <0x40049000 0x1000 0x400ff000 0x40>; 183 reg = <0x40049000 0x1000 0x400ff000 0x40>;
183 interrupts = <0 107 0x04>; 184 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
184 gpio-controller; 185 gpio-controller;
185 #gpio-cells = <2>; 186 #gpio-cells = <2>;
186 interrupt-controller; 187 interrupt-controller;
@@ -191,7 +192,7 @@
191 gpio2: gpio@4004a000 { 192 gpio2: gpio@4004a000 {
192 compatible = "fsl,vf610-gpio"; 193 compatible = "fsl,vf610-gpio";
193 reg = <0x4004a000 0x1000 0x400ff040 0x40>; 194 reg = <0x4004a000 0x1000 0x400ff040 0x40>;
194 interrupts = <0 108 0x04>; 195 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
195 gpio-controller; 196 gpio-controller;
196 #gpio-cells = <2>; 197 #gpio-cells = <2>;
197 interrupt-controller; 198 interrupt-controller;
@@ -202,7 +203,7 @@
202 gpio3: gpio@4004b000 { 203 gpio3: gpio@4004b000 {
203 compatible = "fsl,vf610-gpio"; 204 compatible = "fsl,vf610-gpio";
204 reg = <0x4004b000 0x1000 0x400ff080 0x40>; 205 reg = <0x4004b000 0x1000 0x400ff080 0x40>;
205 interrupts = <0 109 0x04>; 206 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
206 gpio-controller; 207 gpio-controller;
207 #gpio-cells = <2>; 208 #gpio-cells = <2>;
208 interrupt-controller; 209 interrupt-controller;
@@ -213,7 +214,7 @@
213 gpio4: gpio@4004c000 { 214 gpio4: gpio@4004c000 {
214 compatible = "fsl,vf610-gpio"; 215 compatible = "fsl,vf610-gpio";
215 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>; 216 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
216 interrupts = <0 110 0x04>; 217 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
217 gpio-controller; 218 gpio-controller;
218 #gpio-cells = <2>; 219 #gpio-cells = <2>;
219 interrupt-controller; 220 interrupt-controller;
@@ -224,7 +225,7 @@
224 gpio5: gpio@4004d000 { 225 gpio5: gpio@4004d000 {
225 compatible = "fsl,vf610-gpio"; 226 compatible = "fsl,vf610-gpio";
226 reg = <0x4004d000 0x1000 0x400ff100 0x40>; 227 reg = <0x4004d000 0x1000 0x400ff100 0x40>;
227 interrupts = <0 111 0x04>; 228 interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
228 gpio-controller; 229 gpio-controller;
229 #gpio-cells = <2>; 230 #gpio-cells = <2>;
230 interrupt-controller; 231 interrupt-controller;
@@ -242,7 +243,7 @@
242 #size-cells = <0>; 243 #size-cells = <0>;
243 compatible = "fsl,vf610-i2c"; 244 compatible = "fsl,vf610-i2c";
244 reg = <0x40066000 0x1000>; 245 reg = <0x40066000 0x1000>;
245 interrupts =<0 71 0x04>; 246 interrupts =<0 71 IRQ_TYPE_LEVEL_HIGH>;
246 clocks = <&clks VF610_CLK_I2C0>; 247 clocks = <&clks VF610_CLK_I2C0>;
247 clock-names = "ipg"; 248 clock-names = "ipg";
248 status = "disabled"; 249 status = "disabled";
@@ -265,7 +266,7 @@
265 uart4: serial@400a9000 { 266 uart4: serial@400a9000 {
266 compatible = "fsl,vf610-lpuart"; 267 compatible = "fsl,vf610-lpuart";
267 reg = <0x400a9000 0x1000>; 268 reg = <0x400a9000 0x1000>;
268 interrupts = <0 65 0x04>; 269 interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
269 clocks = <&clks VF610_CLK_UART4>; 270 clocks = <&clks VF610_CLK_UART4>;
270 clock-names = "ipg"; 271 clock-names = "ipg";
271 status = "disabled"; 272 status = "disabled";
@@ -274,7 +275,7 @@
274 uart5: serial@400aa000 { 275 uart5: serial@400aa000 {
275 compatible = "fsl,vf610-lpuart"; 276 compatible = "fsl,vf610-lpuart";
276 reg = <0x400aa000 0x1000>; 277 reg = <0x400aa000 0x1000>;
277 interrupts = <0 66 0x04>; 278 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
278 clocks = <&clks VF610_CLK_UART5>; 279 clocks = <&clks VF610_CLK_UART5>;
279 clock-names = "ipg"; 280 clock-names = "ipg";
280 status = "disabled"; 281 status = "disabled";
@@ -283,7 +284,7 @@
283 fec0: ethernet@400d0000 { 284 fec0: ethernet@400d0000 {
284 compatible = "fsl,mvf600-fec"; 285 compatible = "fsl,mvf600-fec";
285 reg = <0x400d0000 0x1000>; 286 reg = <0x400d0000 0x1000>;
286 interrupts = <0 78 0x04>; 287 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
287 clocks = <&clks VF610_CLK_ENET0>, 288 clocks = <&clks VF610_CLK_ENET0>,
288 <&clks VF610_CLK_ENET0>, 289 <&clks VF610_CLK_ENET0>,
289 <&clks VF610_CLK_ENET>; 290 <&clks VF610_CLK_ENET>;
@@ -294,7 +295,7 @@
294 fec1: ethernet@400d1000 { 295 fec1: ethernet@400d1000 {
295 compatible = "fsl,mvf600-fec"; 296 compatible = "fsl,mvf600-fec";
296 reg = <0x400d1000 0x1000>; 297 reg = <0x400d1000 0x1000>;
297 interrupts = <0 79 0x04>; 298 interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
298 clocks = <&clks VF610_CLK_ENET1>, 299 clocks = <&clks VF610_CLK_ENET1>,
299 <&clks VF610_CLK_ENET1>, 300 <&clks VF610_CLK_ENET1>,
300 <&clks VF610_CLK_ENET>; 301 <&clks VF610_CLK_ENET>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-10 18:26:12 -0500