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authorOlof Johansson <olof@lixom.net>2012-09-21 00:16:43 -0400
committerOlof Johansson <olof@lixom.net>2012-09-21 00:16:43 -0400
commitea832c41dacbc4a5f3888d9ef7c38213914aba2a (patch)
treebee97817d9a55f000e2bec5fa5d62d325050e6a6 /arch/arm/boot/dts/tegra30-cardhu.dtsi
parentb74aae9a2074e1caa2e40bf119f3a633f77c94e4 (diff)
parent84bae6c379e362aa017efd417199f51d5c2273ac (diff)
Merge branch 'next/dt' into next/multiplatform
* next/dt: (182 commits) ARM: tegra: Add Avionic Design Tamonten Evaluation Carrier support ARM: tegra: Add Avionic Design Medcom-Wide support ARM: tegra: Add Avionic Design Plutux support ARM: tegra: Add Avionic Design Tamonten support ARM: tegra: dts: Add pwm label ARM: dt: tegra: whistler: configure power off ARM: mxs: m28evk: Disable OCOTP OUI loading ARM: imx6q: use pll2_pfd2_396m as the enfc_sel's parent ARM: dts: imx6q-sabrelite: add usbotg pinctrl support ARM: dts: imx23-olinuxino: Add USB host support ARM: dts: imx6q-sabrelite: add usbmisc device ARM: dts: mx23: Add USB resources ARM: dts: mxs: Add ethernetX to macX aliases ARM: msm: Remove non-DT targets from 8960 ARM: msm: Add DT support for 8960 ARM: msm: Move io mapping prototypes to common.h ARM: msm: Rename board-msm8x60 to signify its DT only status ARM: msm: Make 8660 a DT only target ARM: msm: Move 8660 to DT timer ARM: msm: Add DT support to msm_timer ...
Diffstat (limited to 'arch/arm/boot/dts/tegra30-cardhu.dtsi')
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diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
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@@ -0,0 +1,475 @@
1/include/ "tegra30.dtsi"
2
3/**
4 * This file contains common DT entry for all fab version of Cardhu.
5 * There is multiple fab version of Cardhu starting from A01 to A07.
6 * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
7 * A02 will have different sets of GPIOs for fixed regulator compare to
8 * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
9 * compatible with fab version A04. Based on Cardhu fab version, the
10 * related dts file need to be chosen like for Cardhu fab version A02,
11 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
12 * tegra30-cardhu-a04.dts.
13 * The identification of board is done in two ways, by looking the sticker
14 * on PCB and by reading board id eeprom.
15 * The stciker will have number like 600-81291-1000-002 C.3. In this 4th
16 * number is the fab version like here it is 002 and hence fab version A02.
17 * The (downstream internal) U-Boot of Cardhu display the board-id as
18 * follows:
19 * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
20 * In this Fab version is 02 i.e. A02.
21 * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
22 * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
23 * wide.
24 */
25
26/ {
27 model = "NVIDIA Tegra30 Cardhu evaluation board";
28 compatible = "nvidia,cardhu", "nvidia,tegra30";
29
30 memory {
31 reg = <0x80000000 0x40000000>;
32 };
33
34 pinmux {
35 pinctrl-names = "default";
36 pinctrl-0 = <&state_default>;
37
38 state_default: pinmux {
39 sdmmc1_clk_pz0 {
40 nvidia,pins = "sdmmc1_clk_pz0";
41 nvidia,function = "sdmmc1";
42 nvidia,pull = <0>;
43 nvidia,tristate = <0>;
44 };
45 sdmmc1_cmd_pz1 {
46 nvidia,pins = "sdmmc1_cmd_pz1",
47 "sdmmc1_dat0_py7",
48 "sdmmc1_dat1_py6",
49 "sdmmc1_dat2_py5",
50 "sdmmc1_dat3_py4";
51 nvidia,function = "sdmmc1";
52 nvidia,pull = <2>;
53 nvidia,tristate = <0>;
54 };
55 sdmmc4_clk_pcc4 {
56 nvidia,pins = "sdmmc4_clk_pcc4",
57 "sdmmc4_rst_n_pcc3";
58 nvidia,function = "sdmmc4";
59 nvidia,pull = <0>;
60 nvidia,tristate = <0>;
61 };
62 sdmmc4_dat0_paa0 {
63 nvidia,pins = "sdmmc4_dat0_paa0",
64 "sdmmc4_dat1_paa1",
65 "sdmmc4_dat2_paa2",
66 "sdmmc4_dat3_paa3",
67 "sdmmc4_dat4_paa4",
68 "sdmmc4_dat5_paa5",
69 "sdmmc4_dat6_paa6",
70 "sdmmc4_dat7_paa7";
71 nvidia,function = "sdmmc4";
72 nvidia,pull = <2>;
73 nvidia,tristate = <0>;
74 };
75 dap2_fs_pa2 {
76 nvidia,pins = "dap2_fs_pa2",
77 "dap2_sclk_pa3",
78 "dap2_din_pa4",
79 "dap2_dout_pa5";
80 nvidia,function = "i2s1";
81 nvidia,pull = <0>;
82 nvidia,tristate = <0>;
83 };
84 };
85 };
86
87 serial@70006000 {
88 status = "okay";
89 clock-frequency = <408000000>;
90 };
91
92 i2c@7000c000 {
93 status = "okay";
94 clock-frequency = <100000>;
95 };
96
97 i2c@7000c400 {
98 status = "okay";
99 clock-frequency = <100000>;
100 };
101
102 i2c@7000c500 {
103 status = "okay";
104 clock-frequency = <100000>;
105
106 /* ALS and Proximity sensor */
107 isl29028@44 {
108 compatible = "isil,isl29028";
109 reg = <0x44>;
110 interrupt-parent = <&gpio>;
111 interrupts = <88 0x04>; /*gpio PL0 */
112 };
113 };
114
115 i2c@7000c700 {
116 status = "okay";
117 clock-frequency = <100000>;
118 };
119
120 i2c@7000d000 {
121 status = "okay";
122 clock-frequency = <100000>;
123
124 wm8903: wm8903@1a {
125 compatible = "wlf,wm8903";
126 reg = <0x1a>;
127 interrupt-parent = <&gpio>;
128 interrupts = <179 0x04>; /* gpio PW3 */
129
130 gpio-controller;
131 #gpio-cells = <2>;
132
133 micdet-cfg = <0>;
134 micdet-delay = <100>;
135 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
136 };
137
138 tps62361 {
139 compatible = "ti,tps62361";
140 reg = <0x60>;
141
142 regulator-name = "tps62361-vout";
143 regulator-min-microvolt = <500000>;
144 regulator-max-microvolt = <1500000>;
145 regulator-boot-on;
146 regulator-always-on;
147 ti,vsel0-state-high;
148 ti,vsel1-state-high;
149 };
150
151 pmic: tps65911@2d {
152 compatible = "ti,tps65911";
153 reg = <0x2d>;
154
155 interrupts = <0 86 0x4>;
156 #interrupt-cells = <2>;
157 interrupt-controller;
158
159 ti,system-power-controller;
160
161 #gpio-cells = <2>;
162 gpio-controller;
163
164 vcc1-supply = <&vdd_ac_bat_reg>;
165 vcc2-supply = <&vdd_ac_bat_reg>;
166 vcc3-supply = <&vio_reg>;
167 vcc4-supply = <&vdd_5v0_reg>;
168 vcc5-supply = <&vdd_ac_bat_reg>;
169 vcc6-supply = <&vdd2_reg>;
170 vcc7-supply = <&vdd_ac_bat_reg>;
171 vccio-supply = <&vdd_ac_bat_reg>;
172
173 regulators {
174 #address-cells = <1>;
175 #size-cells = <0>;
176
177 vdd1_reg: regulator@0 {
178 reg = <0>;
179 regulator-compatible = "vdd1";
180 regulator-name = "vddio_ddr_1v2";
181 regulator-min-microvolt = <1200000>;
182 regulator-max-microvolt = <1200000>;
183 regulator-always-on;
184 };
185
186 vdd2_reg: regulator@1 {
187 reg = <1>;
188 regulator-compatible = "vdd2";
189 regulator-name = "vdd_1v5_gen";
190 regulator-min-microvolt = <1500000>;
191 regulator-max-microvolt = <1500000>;
192 regulator-always-on;
193 };
194
195 vddctrl_reg: regulator@2 {
196 reg = <2>;
197 regulator-compatible = "vddctrl";
198 regulator-name = "vdd_cpu,vdd_sys";
199 regulator-min-microvolt = <1000000>;
200 regulator-max-microvolt = <1000000>;
201 regulator-always-on;
202 };
203
204 vio_reg: regulator@3 {
205 reg = <3>;
206 regulator-compatible = "vio";
207 regulator-name = "vdd_1v8_gen";
208 regulator-min-microvolt = <1800000>;
209 regulator-max-microvolt = <1800000>;
210 regulator-always-on;
211 };
212
213 ldo1_reg: regulator@4 {
214 reg = <4>;
215 regulator-compatible = "ldo1";
216 regulator-name = "vdd_pexa,vdd_pexb";
217 regulator-min-microvolt = <1050000>;
218 regulator-max-microvolt = <1050000>;
219 };
220
221 ldo2_reg: regulator@5 {
222 reg = <5>;
223 regulator-compatible = "ldo2";
224 regulator-name = "vdd_sata,avdd_plle";
225 regulator-min-microvolt = <1050000>;
226 regulator-max-microvolt = <1050000>;
227 };
228
229 /* LDO3 is not connected to anything */
230
231 ldo4_reg: regulator@7 {
232 reg = <7>;
233 regulator-compatible = "ldo4";
234 regulator-name = "vdd_rtc";
235 regulator-min-microvolt = <1200000>;
236 regulator-max-microvolt = <1200000>;
237 regulator-always-on;
238 };
239
240 ldo5_reg: regulator@8 {
241 reg = <8>;
242 regulator-compatible = "ldo5";
243 regulator-name = "vddio_sdmmc,avdd_vdac";
244 regulator-min-microvolt = <3300000>;
245 regulator-max-microvolt = <3300000>;
246 regulator-always-on;
247 };
248
249 ldo6_reg: regulator@9 {
250 reg = <9>;
251 regulator-compatible = "ldo6";
252 regulator-name = "avdd_dsi_csi,pwrdet_mipi";
253 regulator-min-microvolt = <1200000>;
254 regulator-max-microvolt = <1200000>;
255 };
256
257 ldo7_reg: regulator@10 {
258 reg = <10>;
259 regulator-compatible = "ldo7";
260 regulator-name = "vdd_pllm,x,u,a_p_c_s";
261 regulator-min-microvolt = <1200000>;
262 regulator-max-microvolt = <1200000>;
263 regulator-always-on;
264 };
265
266 ldo8_reg: regulator@11 {
267 reg = <11>;
268 regulator-compatible = "ldo8";
269 regulator-name = "vdd_ddr_hs";
270 regulator-min-microvolt = <1000000>;
271 regulator-max-microvolt = <1000000>;
272 regulator-always-on;
273 };
274 };
275 };
276 };
277
278 ahub {
279 i2s@70080400 {
280 status = "okay";
281 };
282 };
283
284 pmc {
285 status = "okay";
286 nvidia,invert-interrupt;
287 };
288
289 sdhci@78000000 {
290 status = "okay";
291 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
292 wp-gpios = <&gpio 155 0>; /* gpio PT3 */
293 power-gpios = <&gpio 31 0>; /* gpio PD7 */
294 bus-width = <4>;
295 };
296
297 sdhci@78000600 {
298 status = "okay";
299 bus-width = <8>;
300 };
301
302 regulators {
303 compatible = "simple-bus";
304 #address-cells = <1>;
305 #size-cells = <0>;
306
307 vdd_ac_bat_reg: regulator@0 {
308 compatible = "regulator-fixed";
309 reg = <0>;
310 regulator-name = "vdd_ac_bat";
311 regulator-min-microvolt = <5000000>;
312 regulator-max-microvolt = <5000000>;
313 regulator-always-on;
314 };
315
316 cam_1v8_reg: regulator@1 {
317 compatible = "regulator-fixed";
318 reg = <1>;
319 regulator-name = "cam_1v8";
320 regulator-min-microvolt = <1800000>;
321 regulator-max-microvolt = <1800000>;
322 enable-active-high;
323 gpio = <&gpio 220 0>; /* gpio PBB4 */
324 vin-supply = <&vio_reg>;
325 };
326
327 cp_5v_reg: regulator@2 {
328 compatible = "regulator-fixed";
329 reg = <2>;
330 regulator-name = "cp_5v";
331 regulator-min-microvolt = <5000000>;
332 regulator-max-microvolt = <5000000>;
333 regulator-boot-on;
334 regulator-always-on;
335 enable-active-high;
336 gpio = <&pmic 0 0>; /* PMIC TPS65911 GPIO0 */
337 };
338
339 emmc_3v3_reg: regulator@3 {
340 compatible = "regulator-fixed";
341 reg = <3>;
342 regulator-name = "emmc_3v3";
343 regulator-min-microvolt = <3300000>;
344 regulator-max-microvolt = <3300000>;
345 regulator-always-on;
346 regulator-boot-on;
347 enable-active-high;
348 gpio = <&gpio 25 0>; /* gpio PD1 */
349 vin-supply = <&sys_3v3_reg>;
350 };
351
352 modem_3v3_reg: regulator@4 {
353 compatible = "regulator-fixed";
354 reg = <4>;
355 regulator-name = "modem_3v3";
356 regulator-min-microvolt = <3300000>;
357 regulator-max-microvolt = <3300000>;
358 enable-active-high;
359 gpio = <&gpio 30 0>; /* gpio PD6 */
360 };
361
362 pex_hvdd_3v3_reg: regulator@5 {
363 compatible = "regulator-fixed";
364 reg = <5>;
365 regulator-name = "pex_hvdd_3v3";
366 regulator-min-microvolt = <3300000>;
367 regulator-max-microvolt = <3300000>;
368 enable-active-high;
369 gpio = <&gpio 95 0>; /* gpio PL7 */
370 vin-supply = <&sys_3v3_reg>;
371 };
372
373 vdd_cam1_ldo_reg: regulator@6 {
374 compatible = "regulator-fixed";
375 reg = <6>;
376 regulator-name = "vdd_cam1_ldo";
377 regulator-min-microvolt = <2800000>;
378 regulator-max-microvolt = <2800000>;
379 enable-active-high;
380 gpio = <&gpio 142 0>; /* gpio PR6 */
381 vin-supply = <&sys_3v3_reg>;
382 };
383
384 vdd_cam2_ldo_reg: regulator@7 {
385 compatible = "regulator-fixed";
386 reg = <7>;
387 regulator-name = "vdd_cam2_ldo";
388 regulator-min-microvolt = <2800000>;
389 regulator-max-microvolt = <2800000>;
390 enable-active-high;
391 gpio = <&gpio 143 0>; /* gpio PR7 */
392 vin-supply = <&sys_3v3_reg>;
393 };
394
395 vdd_cam3_ldo_reg: regulator@8 {
396 compatible = "regulator-fixed";
397 reg = <8>;
398 regulator-name = "vdd_cam3_ldo";
399 regulator-min-microvolt = <3300000>;
400 regulator-max-microvolt = <3300000>;
401 enable-active-high;
402 gpio = <&gpio 144 0>; /* gpio PS0 */
403 vin-supply = <&sys_3v3_reg>;
404 };
405
406 vdd_com_reg: regulator@9 {
407 compatible = "regulator-fixed";
408 reg = <9>;
409 regulator-name = "vdd_com";
410 regulator-min-microvolt = <3300000>;
411 regulator-max-microvolt = <3300000>;
412 enable-active-high;
413 gpio = <&gpio 24 0>; /* gpio PD0 */
414 vin-supply = <&sys_3v3_reg>;
415 };
416
417 vdd_fuse_3v3_reg: regulator@10 {
418 compatible = "regulator-fixed";
419 reg = <10>;
420 regulator-name = "vdd_fuse_3v3";
421 regulator-min-microvolt = <3300000>;
422 regulator-max-microvolt = <3300000>;
423 enable-active-high;
424 gpio = <&gpio 94 0>; /* gpio PL6 */
425 vin-supply = <&sys_3v3_reg>;
426 };
427
428 vdd_pnl1_reg: regulator@11 {
429 compatible = "regulator-fixed";
430 reg = <11>;
431 regulator-name = "vdd_pnl1";
432 regulator-min-microvolt = <3300000>;
433 regulator-max-microvolt = <3300000>;
434 regulator-always-on;
435 regulator-boot-on;
436 enable-active-high;
437 gpio = <&gpio 92 0>; /* gpio PL4 */
438 vin-supply = <&sys_3v3_reg>;
439 };
440
441 vdd_vid_reg: regulator@12 {
442 compatible = "regulator-fixed";
443 reg = <12>;
444 regulator-name = "vddio_vid";
445 regulator-min-microvolt = <5000000>;
446 regulator-max-microvolt = <5000000>;
447 enable-active-high;
448 gpio = <&gpio 152 0>; /* GPIO PT0 */
449 gpio-open-drain;
450 vin-supply = <&vdd_5v0_reg>;
451 };
452 };
453
454 sound {
455 compatible = "nvidia,tegra-audio-wm8903-cardhu",
456 "nvidia,tegra-audio-wm8903";
457 nvidia,model = "NVIDIA Tegra Cardhu";
458
459 nvidia,audio-routing =
460 "Headphone Jack", "HPOUTR",
461 "Headphone Jack", "HPOUTL",
462 "Int Spk", "ROP",
463 "Int Spk", "RON",
464 "Int Spk", "LOP",
465 "Int Spk", "LON",
466 "Mic Jack", "MICBIAS",
467 "IN1L", "Mic Jack";
468
469 nvidia,i2s-controller = <&tegra_i2s1>;
470 nvidia,audio-codec = <&wm8903>;
471
472 nvidia,spkr-en-gpios = <&wm8903 2 0>;
473 nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
474 };
475};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-11 19:16:35 -0500