diff options
author | Stephen Warren <swarren@nvidia.com> | 2013-11-06 16:00:25 -0500 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2013-12-11 18:41:55 -0500 |
commit | d8f64797c5ff3351a54830bba2cbc7e0b00e4613 (patch) | |
tree | 6df5a7b5c0fe9effa08aef6df00d8d8dc6b08014 /arch/arm/boot/dts/tegra20.dtsi | |
parent | e9827d9be9777cf287dd1340e6e7a8526f9e0b70 (diff) |
ARM: tegra: add missing clock documentation to DT bindings
Many of the Tegra DT binding documents say nothing about the clocks or
clock-names properties, yet those are present and required in DT files.
This patch simply updates the documentation file to match the implicit
definition of the binding, based on real-world DT content.
All Tegra bindings that mention clocks are updated to have consistent
wording and formatting of the clock-related properties.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
-rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index df40b54fd8bc..4eaeab3866bc 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi | |||
@@ -75,7 +75,7 @@ | |||
75 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; | 75 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
76 | clocks = <&tegra_car TEGRA20_CLK_DISP1>, | 76 | clocks = <&tegra_car TEGRA20_CLK_DISP1>, |
77 | <&tegra_car TEGRA20_CLK_PLL_P>; | 77 | <&tegra_car TEGRA20_CLK_PLL_P>; |
78 | clock-names = "disp1", "parent"; | 78 | clock-names = "dc", "parent"; |
79 | 79 | ||
80 | rgb { | 80 | rgb { |
81 | status = "disabled"; | 81 | status = "disabled"; |
@@ -88,7 +88,7 @@ | |||
88 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; | 88 | interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; |
89 | clocks = <&tegra_car TEGRA20_CLK_DISP2>, | 89 | clocks = <&tegra_car TEGRA20_CLK_DISP2>, |
90 | <&tegra_car TEGRA20_CLK_PLL_P>; | 90 | <&tegra_car TEGRA20_CLK_PLL_P>; |
91 | clock-names = "disp2", "parent"; | 91 | clock-names = "dc", "parent"; |
92 | 92 | ||
93 | rgb { | 93 | rgb { |
94 | status = "disabled"; | 94 | status = "disabled"; |