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authorStephen Warren <swarren@nvidia.com>2012-11-16 12:53:04 -0500
committerStephen Warren <swarren@nvidia.com>2012-11-16 12:56:38 -0500
commit2658ef15b27e0fb166f4b7b997b027a223cd0793 (patch)
tree5708a4e8e7ba909dd8020f9ab34a08dffd14bd4b /arch/arm/boot/dts/tegra20-whistler.dts
parentcab2ed62fe378be22c9de12ff8a616622b68c70c (diff)
ARM: tegra: whistler: enable HDMI port
Enable host1x, and the HDMI output. Whistler also has a DSI-based LCD, and a VGA output. tegradrm doesn't support either of those output types yet. Based on work by Thierry Reding for TrimSlice. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-whistler.dts')
-rw-r--r--arch/arm/boot/dts/tegra20-whistler.dts21
1 files changed, 19 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts
index 94a71c91beb5..20d576ecd555 100644
--- a/arch/arm/boot/dts/tegra20-whistler.dts
+++ b/arch/arm/boot/dts/tegra20-whistler.dts
@@ -10,6 +10,18 @@
10 reg = <0x00000000 0x20000000>; 10 reg = <0x00000000 0x20000000>;
11 }; 11 };
12 12
13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
22 };
23 };
24
13 pinmux { 25 pinmux {
14 pinctrl-names = "default"; 26 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 27 pinctrl-0 = <&state_default>;
@@ -246,6 +258,11 @@
246 clock-frequency = <216000000>; 258 clock-frequency = <216000000>;
247 }; 259 };
248 260
261 hdmi_ddc: i2c@7000c400 {
262 status = "okay";
263 clock-frequency = <100000>;
264 };
265
249 i2c@7000d000 { 266 i2c@7000d000 {
250 status = "okay"; 267 status = "okay";
251 clock-frequency = <100000>; 268 clock-frequency = <100000>;
@@ -356,7 +373,7 @@
356 regulator-always-on; 373 regulator-always-on;
357 }; 374 };
358 375
359 ldo6 { 376 hdmi_pll_reg: ldo6 {
360 regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; 377 regulator-name = "nvvdd_ldo6,avdd_hdmi_pll";
361 regulator-min-microvolt = <1800000>; 378 regulator-min-microvolt = <1800000>;
362 regulator-max-microvolt = <1800000>; 379 regulator-max-microvolt = <1800000>;
@@ -388,7 +405,7 @@
388 regulator-always-on; 405 regulator-always-on;
389 }; 406 };
390 407
391 ldo11 { 408 hdmi_vdd_reg: ldo11 {
392 regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; 409 regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi";
393 regulator-min-microvolt = <3300000>; 410 regulator-min-microvolt = <3300000>;
394 regulator-max-microvolt = <3300000>; 411 regulator-max-microvolt = <3300000>;