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authorOlof Johansson <olof@lixom.net>2013-02-05 16:19:11 -0500
committerOlof Johansson <olof@lixom.net>2013-02-05 16:19:11 -0500
commit5b22c33e8e52ea0e2530037da1f97e88c0b42214 (patch)
tree546f1e21ea6764b798ee017a470b69a033a62838 /arch/arm/boot/dts/tegra20-ventana.dts
parent0b6ad80abb1ad1584347e5ec5c5739ebc540a1a7 (diff)
parent3fbf07d80b40f73c304624179381f9038bd03b74 (diff)
Merge tag 'tegra-for-3.9-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt
From Stephen Warren: ARM: tegra: device tree updates Numerous updates to the various Tegra device trees are made: * Addition of NVIDIA Beaver (Tegra30) and Toradex Colibri T20 and Iris carrier boards. * Enablement of the HDMI connector on most boards. * Enablement of the keyboard controller on a few boards. * Addition of the AC'97 controller to Tegra20. * Addition of a GPIO poweroff node for TrimSlice. * Changes to support the new "high speed UART" (DMA-capable) driver for Tegra serial ports, and enablement for Cardhu's UART C. * A few cleanups, such as compatible flag fixes, node renames, node ordering fixes, commonizing properties into SoC .dtsi files, etc.. This pull request is based on (most of) the previous pull request with tag tegra-for-3.9-soc-t114. * tag 'tegra-for-3.9-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (22 commits) ARM: dt: tegra30: Rename "smmu" to "iommu" ARM: dt: tegra20: Rename "gart" to "iommu" ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi ARM: tegra: Add Toradex Iris carrier board DT with T20 512MB COM ARM: tegra: Add Colibri T20 512MB COM device tree ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi ARM: tegra: harmony: enable keyboard in DT ARM: tegra: whistler: enable keyboard in DT ARM: tegra: cardhu: register UARTC ARM: tegra: seaboard: enable keyboard in DT ARM: tegra: add DT entry for KBC controller ARM: tegra: swap cache-/interrupt-ctrlr nodes in DT ASoC: tegra: add ac97 host controller to device tree ARM: DT: tegra: Add Tegra30 Beaver board support ARM: DT: tegra: Add board level compatible properties ARM: tegra: paz00: enable HDMI port ARM: tegra: ventana: enable HDMI port ARM: tegra: seaboard: enable HDMI port ARM: tegra: trimslice: add gpio-poweroff node to DT ARM: DT: tegra: Unify the description of Tegra20 boards ...
Diffstat (limited to 'arch/arm/boot/dts/tegra20-ventana.dts')
-rw-r--r--arch/arm/boot/dts/tegra20-ventana.dts23
1 files changed, 17 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index f6c61d10fd27..425c89000c20 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -3,13 +3,25 @@
3/include/ "tegra20.dtsi" 3/include/ "tegra20.dtsi"
4 4
5/ { 5/ {
6 model = "NVIDIA Tegra2 Ventana evaluation board"; 6 model = "NVIDIA Tegra20 Ventana evaluation board";
7 compatible = "nvidia,ventana", "nvidia,tegra20"; 7 compatible = "nvidia,ventana", "nvidia,tegra20";
8 8
9 memory { 9 memory {
10 reg = <0x00000000 0x40000000>; 10 reg = <0x00000000 0x40000000>;
11 }; 11 };
12 12
13 host1x {
14 hdmi {
15 status = "okay";
16
17 vdd-supply = <&hdmi_vdd_reg>;
18 pll-supply = <&hdmi_pll_reg>;
19
20 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
21 nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */
22 };
23 };
24
13 pinmux { 25 pinmux {
14 pinctrl-names = "default"; 26 pinctrl-names = "default";
15 pinctrl-0 = <&state_default>; 27 pinctrl-0 = <&state_default>;
@@ -288,7 +300,6 @@
288 300
289 serial@70006300 { 301 serial@70006300 {
290 status = "okay"; 302 status = "okay";
291 clock-frequency = <216000000>;
292 }; 303 };
293 304
294 i2c@7000c000 { 305 i2c@7000c000 {
@@ -320,7 +331,7 @@
320 331
321 i2c@7000c400 { 332 i2c@7000c400 {
322 status = "okay"; 333 status = "okay";
323 clock-frequency = <400000>; 334 clock-frequency = <100000>;
324 }; 335 };
325 336
326 i2cmux { 337 i2cmux {
@@ -335,7 +346,7 @@
335 pinctrl-1 = <&state_i2cmux_pta>; 346 pinctrl-1 = <&state_i2cmux_pta>;
336 pinctrl-2 = <&state_i2cmux_idle>; 347 pinctrl-2 = <&state_i2cmux_idle>;
337 348
338 i2c@0 { 349 hdmi_ddc: i2c@0 {
339 reg = <0>; 350 reg = <0>;
340 #address-cells = <1>; 351 #address-cells = <1>;
341 #size-cells = <0>; 352 #size-cells = <0>;
@@ -446,13 +457,13 @@
446 regulator-max-microvolt = <1800000>; 457 regulator-max-microvolt = <1800000>;
447 }; 458 };
448 459
449 ldo7 { 460 hdmi_vdd_reg: ldo7 {
450 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse"; 461 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
451 regulator-min-microvolt = <3300000>; 462 regulator-min-microvolt = <3300000>;
452 regulator-max-microvolt = <3300000>; 463 regulator-max-microvolt = <3300000>;
453 }; 464 };
454 465
455 ldo8 { 466 hdmi_pll_reg: ldo8 {
456 regulator-name = "vdd_ldo8,avdd_hdmi_pll"; 467 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
457 regulator-min-microvolt = <1800000>; 468 regulator-min-microvolt = <1800000>;
458 regulator-max-microvolt = <1800000>; 469 regulator-max-microvolt = <1800000>;