diff options
author | Stephen Warren <swarren@nvidia.com> | 2013-11-25 19:53:16 -0500 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2013-12-16 16:09:16 -0500 |
commit | 58ecb23f64ee3a2ef66bb55b2e1e841385b6d08b (patch) | |
tree | 91933b662c5ea802874259c9a1b555774834c4f2 /arch/arm/boot/dts/tegra20-trimslice.dts | |
parent | 18f48a4f1d49d522285b5a9f3c5d984f4fdaae01 (diff) |
ARM: tegra: add missing unit addresses to DT
DT node names should include a unit address iff the node has a reg
property. For Tegra DTs at least, we were previously applying a different
rule, namely that node names only needed to include a unit address if it
was required to make the node name unique. Consequently, many unit
addresses are missing. Add them.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-trimslice.dts')
-rw-r--r-- | arch/arm/boot/dts/tegra20-trimslice.dts | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 78deea5c0d21..eab7cd25dd55 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts | |||
@@ -10,8 +10,8 @@ | |||
10 | reg = <0x00000000 0x40000000>; | 10 | reg = <0x00000000 0x40000000>; |
11 | }; | 11 | }; |
12 | 12 | ||
13 | host1x { | 13 | host1x@50000000 { |
14 | hdmi { | 14 | hdmi@54280000 { |
15 | status = "okay"; | 15 | status = "okay"; |
16 | 16 | ||
17 | vdd-supply = <&hdmi_vdd_reg>; | 17 | vdd-supply = <&hdmi_vdd_reg>; |
@@ -23,7 +23,7 @@ | |||
23 | }; | 23 | }; |
24 | }; | 24 | }; |
25 | 25 | ||
26 | pinmux { | 26 | pinmux@70000014 { |
27 | pinctrl-names = "default"; | 27 | pinctrl-names = "default"; |
28 | pinctrl-0 = <&state_default>; | 28 | pinctrl-0 = <&state_default>; |
29 | 29 | ||
@@ -301,7 +301,7 @@ | |||
301 | }; | 301 | }; |
302 | }; | 302 | }; |
303 | 303 | ||
304 | pmc { | 304 | pmc@7000e400 { |
305 | nvidia,suspend-mode = <1>; | 305 | nvidia,suspend-mode = <1>; |
306 | nvidia,cpu-pwr-good-time = <5000>; | 306 | nvidia,cpu-pwr-good-time = <5000>; |
307 | nvidia,cpu-pwr-off-time = <5000>; | 307 | nvidia,cpu-pwr-off-time = <5000>; |
@@ -310,7 +310,7 @@ | |||
310 | nvidia,sys-clock-req-active-high; | 310 | nvidia,sys-clock-req-active-high; |
311 | }; | 311 | }; |
312 | 312 | ||
313 | pcie-controller { | 313 | pcie-controller@80003000 { |
314 | status = "okay"; | 314 | status = "okay"; |
315 | pex-clk-supply = <&pci_clk_reg>; | 315 | pex-clk-supply = <&pci_clk_reg>; |
316 | vdd-supply = <&pci_vdd_reg>; | 316 | vdd-supply = <&pci_vdd_reg>; |
@@ -366,7 +366,7 @@ | |||
366 | #address-cells = <1>; | 366 | #address-cells = <1>; |
367 | #size-cells = <0>; | 367 | #size-cells = <0>; |
368 | 368 | ||
369 | clk32k_in: clock { | 369 | clk32k_in: clock@0 { |
370 | compatible = "fixed-clock"; | 370 | compatible = "fixed-clock"; |
371 | reg=<0>; | 371 | reg=<0>; |
372 | #clock-cells = <0>; | 372 | #clock-cells = <0>; |