diff options
author | Stephen Warren <swarren@nvidia.com> | 2012-06-11 18:25:07 -0400 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2012-06-20 14:30:10 -0400 |
commit | 702b0e4f2f2782962aab7d9a0a40ad68770bb1f6 (patch) | |
tree | 8f3142ad5d13124790590f06cadef9f593ccdf21 /arch/arm/boot/dts/tegra20-seaboard.dts | |
parent | 0336553e4a8c1fefc11aa5656cebf2ce80657322 (diff) |
ARM: dt: tegra: rename board files to match SoC
Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This
change modifies the Tegra board files to be named the same way for
consistency.
Once a related change is made in U-Boot, this will cause both U-Boot and
the kernel to use the same names for the .dts files and SoC identifiers,
thus allowing U-Boot's recently added "soc" and "board" environment
variables to be used to construct the name of Tegra .dtb files, and hence
allow board-generic U-Boot bootcmd scripts to be written.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-seaboard.dts')
-rw-r--r-- | arch/arm/boot/dts/tegra20-seaboard.dts | 444 |
1 files changed, 444 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts new file mode 100644 index 000000000000..b797901d040d --- /dev/null +++ b/arch/arm/boot/dts/tegra20-seaboard.dts | |||
@@ -0,0 +1,444 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /include/ "tegra20.dtsi" | ||
4 | |||
5 | / { | ||
6 | model = "NVIDIA Seaboard"; | ||
7 | compatible = "nvidia,seaboard", "nvidia,tegra20"; | ||
8 | |||
9 | memory { | ||
10 | reg = <0x00000000 0x40000000>; | ||
11 | }; | ||
12 | |||
13 | pinmux { | ||
14 | pinctrl-names = "default"; | ||
15 | pinctrl-0 = <&state_default>; | ||
16 | |||
17 | state_default: pinmux { | ||
18 | ata { | ||
19 | nvidia,pins = "ata"; | ||
20 | nvidia,function = "ide"; | ||
21 | }; | ||
22 | atb { | ||
23 | nvidia,pins = "atb", "gma", "gme"; | ||
24 | nvidia,function = "sdio4"; | ||
25 | }; | ||
26 | atc { | ||
27 | nvidia,pins = "atc"; | ||
28 | nvidia,function = "nand"; | ||
29 | }; | ||
30 | atd { | ||
31 | nvidia,pins = "atd", "ate", "gmb", "spia", | ||
32 | "spib", "spic"; | ||
33 | nvidia,function = "gmi"; | ||
34 | }; | ||
35 | cdev1 { | ||
36 | nvidia,pins = "cdev1"; | ||
37 | nvidia,function = "plla_out"; | ||
38 | }; | ||
39 | cdev2 { | ||
40 | nvidia,pins = "cdev2"; | ||
41 | nvidia,function = "pllp_out4"; | ||
42 | }; | ||
43 | crtp { | ||
44 | nvidia,pins = "crtp", "lm1"; | ||
45 | nvidia,function = "crt"; | ||
46 | }; | ||
47 | csus { | ||
48 | nvidia,pins = "csus"; | ||
49 | nvidia,function = "vi_sensor_clk"; | ||
50 | }; | ||
51 | dap1 { | ||
52 | nvidia,pins = "dap1"; | ||
53 | nvidia,function = "dap1"; | ||
54 | }; | ||
55 | dap2 { | ||
56 | nvidia,pins = "dap2"; | ||
57 | nvidia,function = "dap2"; | ||
58 | }; | ||
59 | dap3 { | ||
60 | nvidia,pins = "dap3"; | ||
61 | nvidia,function = "dap3"; | ||
62 | }; | ||
63 | dap4 { | ||
64 | nvidia,pins = "dap4"; | ||
65 | nvidia,function = "dap4"; | ||
66 | }; | ||
67 | ddc { | ||
68 | nvidia,pins = "ddc", "owc", "spdi", "spdo", | ||
69 | "uac"; | ||
70 | nvidia,function = "rsvd2"; | ||
71 | }; | ||
72 | dta { | ||
73 | nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte"; | ||
74 | nvidia,function = "vi"; | ||
75 | }; | ||
76 | dtf { | ||
77 | nvidia,pins = "dtf"; | ||
78 | nvidia,function = "i2c3"; | ||
79 | }; | ||
80 | gmc { | ||
81 | nvidia,pins = "gmc"; | ||
82 | nvidia,function = "uartd"; | ||
83 | }; | ||
84 | gmd { | ||
85 | nvidia,pins = "gmd"; | ||
86 | nvidia,function = "sflash"; | ||
87 | }; | ||
88 | gpu { | ||
89 | nvidia,pins = "gpu"; | ||
90 | nvidia,function = "pwm"; | ||
91 | }; | ||
92 | gpu7 { | ||
93 | nvidia,pins = "gpu7"; | ||
94 | nvidia,function = "rtck"; | ||
95 | }; | ||
96 | gpv { | ||
97 | nvidia,pins = "gpv", "slxa", "slxk"; | ||
98 | nvidia,function = "pcie"; | ||
99 | }; | ||
100 | hdint { | ||
101 | nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1", | ||
102 | "lsck", "lsda"; | ||
103 | nvidia,function = "hdmi"; | ||
104 | }; | ||
105 | i2cp { | ||
106 | nvidia,pins = "i2cp"; | ||
107 | nvidia,function = "i2cp"; | ||
108 | }; | ||
109 | irrx { | ||
110 | nvidia,pins = "irrx", "irtx"; | ||
111 | nvidia,function = "uartb"; | ||
112 | }; | ||
113 | kbca { | ||
114 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", | ||
115 | "kbce", "kbcf"; | ||
116 | nvidia,function = "kbc"; | ||
117 | }; | ||
118 | lcsn { | ||
119 | nvidia,pins = "lcsn", "ldc", "lm0", "lpw1", | ||
120 | "lsdi", "lvp0"; | ||
121 | nvidia,function = "rsvd4"; | ||
122 | }; | ||
123 | ld0 { | ||
124 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", | ||
125 | "ld5", "ld6", "ld7", "ld8", "ld9", | ||
126 | "ld10", "ld11", "ld12", "ld13", "ld14", | ||
127 | "ld15", "ld16", "ld17", "ldi", "lhp0", | ||
128 | "lhp1", "lhp2", "lhs", "lpp", "lsc0", | ||
129 | "lspi", "lvp1", "lvs"; | ||
130 | nvidia,function = "displaya"; | ||
131 | }; | ||
132 | pmc { | ||
133 | nvidia,pins = "pmc"; | ||
134 | nvidia,function = "pwr_on"; | ||
135 | }; | ||
136 | pta { | ||
137 | nvidia,pins = "pta"; | ||
138 | nvidia,function = "i2c2"; | ||
139 | }; | ||
140 | rm { | ||
141 | nvidia,pins = "rm"; | ||
142 | nvidia,function = "i2c1"; | ||
143 | }; | ||
144 | sdb { | ||
145 | nvidia,pins = "sdb", "sdc", "sdd"; | ||
146 | nvidia,function = "sdio3"; | ||
147 | }; | ||
148 | sdio1 { | ||
149 | nvidia,pins = "sdio1"; | ||
150 | nvidia,function = "sdio1"; | ||
151 | }; | ||
152 | slxc { | ||
153 | nvidia,pins = "slxc", "slxd"; | ||
154 | nvidia,function = "spdif"; | ||
155 | }; | ||
156 | spid { | ||
157 | nvidia,pins = "spid", "spie", "spif"; | ||
158 | nvidia,function = "spi1"; | ||
159 | }; | ||
160 | spig { | ||
161 | nvidia,pins = "spig", "spih"; | ||
162 | nvidia,function = "spi2_alt"; | ||
163 | }; | ||
164 | uaa { | ||
165 | nvidia,pins = "uaa", "uab", "uda"; | ||
166 | nvidia,function = "ulpi"; | ||
167 | }; | ||
168 | uad { | ||
169 | nvidia,pins = "uad"; | ||
170 | nvidia,function = "irda"; | ||
171 | }; | ||
172 | uca { | ||
173 | nvidia,pins = "uca", "ucb"; | ||
174 | nvidia,function = "uartc"; | ||
175 | }; | ||
176 | conf_ata { | ||
177 | nvidia,pins = "ata", "atb", "atc", "atd", | ||
178 | "cdev1", "cdev2", "dap1", "dap2", | ||
179 | "dap4", "dtf", "gma", "gmc", "gmd", | ||
180 | "gme", "gpu", "gpu7", "i2cp", "irrx", | ||
181 | "irtx", "pta", "rm", "sdc", "sdd", | ||
182 | "slxd", "slxk", "spdi", "spdo", "uac", | ||
183 | "uad", "uca", "ucb", "uda"; | ||
184 | nvidia,pull = <0>; | ||
185 | nvidia,tristate = <0>; | ||
186 | }; | ||
187 | conf_ate { | ||
188 | nvidia,pins = "ate", "csus", "dap3", "ddc", | ||
189 | "gpv", "owc", "slxc", "spib", "spid", | ||
190 | "spie"; | ||
191 | nvidia,pull = <0>; | ||
192 | nvidia,tristate = <1>; | ||
193 | }; | ||
194 | conf_ck32 { | ||
195 | nvidia,pins = "ck32", "ddrc", "pmca", "pmcb", | ||
196 | "pmcc", "pmcd", "pmce", "xm2c", "xm2d"; | ||
197 | nvidia,pull = <0>; | ||
198 | }; | ||
199 | conf_crtp { | ||
200 | nvidia,pins = "crtp", "gmb", "slxa", "spia", | ||
201 | "spig", "spih"; | ||
202 | nvidia,pull = <2>; | ||
203 | nvidia,tristate = <1>; | ||
204 | }; | ||
205 | conf_dta { | ||
206 | nvidia,pins = "dta", "dtb", "dtc", "dtd"; | ||
207 | nvidia,pull = <1>; | ||
208 | nvidia,tristate = <0>; | ||
209 | }; | ||
210 | conf_dte { | ||
211 | nvidia,pins = "dte", "spif"; | ||
212 | nvidia,pull = <1>; | ||
213 | nvidia,tristate = <1>; | ||
214 | }; | ||
215 | conf_hdint { | ||
216 | nvidia,pins = "hdint", "lcsn", "ldc", "lm1", | ||
217 | "lpw1", "lsc1", "lsck", "lsda", "lsdi", | ||
218 | "lvp0"; | ||
219 | nvidia,tristate = <1>; | ||
220 | }; | ||
221 | conf_kbca { | ||
222 | nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", | ||
223 | "kbce", "kbcf", "sdio1", "spic", "uaa", | ||
224 | "uab"; | ||
225 | nvidia,pull = <2>; | ||
226 | nvidia,tristate = <0>; | ||
227 | }; | ||
228 | conf_lc { | ||
229 | nvidia,pins = "lc", "ls"; | ||
230 | nvidia,pull = <2>; | ||
231 | }; | ||
232 | conf_ld0 { | ||
233 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", | ||
234 | "ld5", "ld6", "ld7", "ld8", "ld9", | ||
235 | "ld10", "ld11", "ld12", "ld13", "ld14", | ||
236 | "ld15", "ld16", "ld17", "ldi", "lhp0", | ||
237 | "lhp1", "lhp2", "lhs", "lm0", "lpp", | ||
238 | "lpw0", "lpw2", "lsc0", "lspi", "lvp1", | ||
239 | "lvs", "pmc", "sdb"; | ||
240 | nvidia,tristate = <0>; | ||
241 | }; | ||
242 | conf_ld17_0 { | ||
243 | nvidia,pins = "ld17_0", "ld19_18", "ld21_20", | ||
244 | "ld23_22"; | ||
245 | nvidia,pull = <1>; | ||
246 | }; | ||
247 | drive_sdio1 { | ||
248 | nvidia,pins = "drive_sdio1"; | ||
249 | nvidia,high-speed-mode = <0>; | ||
250 | nvidia,schmitt = <0>; | ||
251 | nvidia,low-power-mode = <3>; | ||
252 | nvidia,pull-down-strength = <31>; | ||
253 | nvidia,pull-up-strength = <31>; | ||
254 | nvidia,slew-rate-rising = <3>; | ||
255 | nvidia,slew-rate-falling = <3>; | ||
256 | }; | ||
257 | }; | ||
258 | }; | ||
259 | |||
260 | i2s@70002800 { | ||
261 | status = "okay"; | ||
262 | }; | ||
263 | |||
264 | serial@70006300 { | ||
265 | status = "okay"; | ||
266 | clock-frequency = <216000000>; | ||
267 | }; | ||
268 | |||
269 | i2c@7000c000 { | ||
270 | status = "okay"; | ||
271 | clock-frequency = <400000>; | ||
272 | |||
273 | wm8903: wm8903@1a { | ||
274 | compatible = "wlf,wm8903"; | ||
275 | reg = <0x1a>; | ||
276 | interrupt-parent = <&gpio>; | ||
277 | interrupts = <187 0x04>; | ||
278 | |||
279 | gpio-controller; | ||
280 | #gpio-cells = <2>; | ||
281 | |||
282 | micdet-cfg = <0>; | ||
283 | micdet-delay = <100>; | ||
284 | gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; | ||
285 | }; | ||
286 | |||
287 | /* ALS and proximity sensor */ | ||
288 | isl29018@44 { | ||
289 | compatible = "isil,isl29018"; | ||
290 | reg = <0x44>; | ||
291 | interrupt-parent = <&gpio>; | ||
292 | interrupts = <202 0x04>; /* GPIO PZ2 */ | ||
293 | }; | ||
294 | |||
295 | gyrometer@68 { | ||
296 | compatible = "invn,mpu3050"; | ||
297 | reg = <0x68>; | ||
298 | interrupt-parent = <&gpio>; | ||
299 | interrupts = <204 0x04>; /* gpio PZ4 */ | ||
300 | }; | ||
301 | }; | ||
302 | |||
303 | i2c@7000c400 { | ||
304 | status = "okay"; | ||
305 | clock-frequency = <100000>; | ||
306 | |||
307 | smart-battery@b { | ||
308 | compatible = "ti,bq20z75", "smart-battery-1.1"; | ||
309 | reg = <0xb>; | ||
310 | ti,i2c-retry-count = <2>; | ||
311 | ti,poll-retry-count = <10>; | ||
312 | }; | ||
313 | }; | ||
314 | |||
315 | i2c@7000c500 { | ||
316 | status = "okay"; | ||
317 | clock-frequency = <400000>; | ||
318 | }; | ||
319 | |||
320 | i2c@7000d000 { | ||
321 | status = "okay"; | ||
322 | clock-frequency = <400000>; | ||
323 | |||
324 | temperature-sensor@4c { | ||
325 | compatible = "nct1008"; | ||
326 | reg = <0x4c>; | ||
327 | }; | ||
328 | |||
329 | magnetometer@c { | ||
330 | compatible = "ak8975"; | ||
331 | reg = <0xc>; | ||
332 | interrupt-parent = <&gpio>; | ||
333 | interrupts = <109 0x04>; /* gpio PN5 */ | ||
334 | }; | ||
335 | }; | ||
336 | |||
337 | memory-controller@0x7000f400 { | ||
338 | emc-table@190000 { | ||
339 | reg = <190000>; | ||
340 | compatible = "nvidia,tegra20-emc-table"; | ||
341 | clock-frequency = <190000>; | ||
342 | nvidia,emc-registers = <0x0000000c 0x00000026 | ||
343 | 0x00000009 0x00000003 0x00000004 0x00000004 | ||
344 | 0x00000002 0x0000000c 0x00000003 0x00000003 | ||
345 | 0x00000002 0x00000001 0x00000004 0x00000005 | ||
346 | 0x00000004 0x00000009 0x0000000d 0x0000059f | ||
347 | 0x00000000 0x00000003 0x00000003 0x00000003 | ||
348 | 0x00000003 0x00000001 0x0000000b 0x000000c8 | ||
349 | 0x00000003 0x00000007 0x00000004 0x0000000f | ||
350 | 0x00000002 0x00000000 0x00000000 0x00000002 | ||
351 | 0x00000000 0x00000000 0x00000083 0xa06204ae | ||
352 | 0x007dc010 0x00000000 0x00000000 0x00000000 | ||
353 | 0x00000000 0x00000000 0x00000000 0x00000000>; | ||
354 | }; | ||
355 | |||
356 | emc-table@380000 { | ||
357 | reg = <380000>; | ||
358 | compatible = "nvidia,tegra20-emc-table"; | ||
359 | clock-frequency = <380000>; | ||
360 | nvidia,emc-registers = <0x00000017 0x0000004b | ||
361 | 0x00000012 0x00000006 0x00000004 0x00000005 | ||
362 | 0x00000003 0x0000000c 0x00000006 0x00000006 | ||
363 | 0x00000003 0x00000001 0x00000004 0x00000005 | ||
364 | 0x00000004 0x00000009 0x0000000d 0x00000b5f | ||
365 | 0x00000000 0x00000003 0x00000003 0x00000006 | ||
366 | 0x00000006 0x00000001 0x00000011 0x000000c8 | ||
367 | 0x00000003 0x0000000e 0x00000007 0x0000000f | ||
368 | 0x00000002 0x00000000 0x00000000 0x00000002 | ||
369 | 0x00000000 0x00000000 0x00000083 0xe044048b | ||
370 | 0x007d8010 0x00000000 0x00000000 0x00000000 | ||
371 | 0x00000000 0x00000000 0x00000000 0x00000000>; | ||
372 | }; | ||
373 | }; | ||
374 | |||
375 | usb@c5000000 { | ||
376 | status = "okay"; | ||
377 | nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ | ||
378 | dr_mode = "otg"; | ||
379 | }; | ||
380 | |||
381 | usb@c5004000 { | ||
382 | status = "okay"; | ||
383 | nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ | ||
384 | }; | ||
385 | |||
386 | usb@c5008000 { | ||
387 | status = "okay"; | ||
388 | }; | ||
389 | |||
390 | sdhci@c8000400 { | ||
391 | status = "okay"; | ||
392 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | ||
393 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | ||
394 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ | ||
395 | bus-width = <4>; | ||
396 | }; | ||
397 | |||
398 | sdhci@c8000600 { | ||
399 | status = "okay"; | ||
400 | bus-width = <8>; | ||
401 | }; | ||
402 | |||
403 | gpio-keys { | ||
404 | compatible = "gpio-keys"; | ||
405 | |||
406 | power { | ||
407 | label = "Power"; | ||
408 | gpios = <&gpio 170 1>; /* gpio PV2, active low */ | ||
409 | linux,code = <116>; /* KEY_POWER */ | ||
410 | gpio-key,wakeup; | ||
411 | }; | ||
412 | |||
413 | lid { | ||
414 | label = "Lid"; | ||
415 | gpios = <&gpio 23 0>; /* gpio PC7 */ | ||
416 | linux,input-type = <5>; /* EV_SW */ | ||
417 | linux,code = <0>; /* SW_LID */ | ||
418 | debounce-interval = <1>; | ||
419 | gpio-key,wakeup; | ||
420 | }; | ||
421 | }; | ||
422 | |||
423 | sound { | ||
424 | compatible = "nvidia,tegra-audio-wm8903-seaboard", | ||
425 | "nvidia,tegra-audio-wm8903"; | ||
426 | nvidia,model = "NVIDIA Tegra Seaboard"; | ||
427 | |||
428 | nvidia,audio-routing = | ||
429 | "Headphone Jack", "HPOUTR", | ||
430 | "Headphone Jack", "HPOUTL", | ||
431 | "Int Spk", "ROP", | ||
432 | "Int Spk", "RON", | ||
433 | "Int Spk", "LOP", | ||
434 | "Int Spk", "LON", | ||
435 | "Mic Jack", "MICBIAS", | ||
436 | "IN1R", "Mic Jack"; | ||
437 | |||
438 | nvidia,i2s-controller = <&tegra_i2s1>; | ||
439 | nvidia,audio-codec = <&wm8903>; | ||
440 | |||
441 | nvidia,spkr-en-gpios = <&wm8903 2 0>; | ||
442 | nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */ | ||
443 | }; | ||
444 | }; | ||