diff options
author | Stephen Warren <swarren@nvidia.com> | 2013-01-02 16:53:22 -0500 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2013-01-28 13:24:07 -0500 |
commit | 11a3c868f923b1c0b7a5c532881883b7db077ec3 (patch) | |
tree | 160c783ef62e0d67a7aa2a2bf9a3fa7e5d36035d /arch/arm/boot/dts/tegra20-paz00.dts | |
parent | 97d5520f9364444ec78f0a20bf6d880ea80934b8 (diff) |
ARM: tegra: paz00: enable HDMI port
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-paz00.dts')
-rw-r--r-- | arch/arm/boot/dts/tegra20-paz00.dts | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index a965fe9c7aa1..2e94d34d9e61 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts | |||
@@ -10,6 +10,18 @@ | |||
10 | reg = <0x00000000 0x20000000>; | 10 | reg = <0x00000000 0x20000000>; |
11 | }; | 11 | }; |
12 | 12 | ||
13 | host1x { | ||
14 | hdmi { | ||
15 | status = "okay"; | ||
16 | |||
17 | vdd-supply = <&hdmi_vdd_reg>; | ||
18 | pll-supply = <&hdmi_pll_reg>; | ||
19 | |||
20 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; | ||
21 | nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ | ||
22 | }; | ||
23 | }; | ||
24 | |||
13 | pinmux { | 25 | pinmux { |
14 | pinctrl-names = "default"; | 26 | pinctrl-names = "default"; |
15 | pinctrl-0 = <&state_default>; | 27 | pinctrl-0 = <&state_default>; |
@@ -252,9 +264,9 @@ | |||
252 | }; | 264 | }; |
253 | }; | 265 | }; |
254 | 266 | ||
255 | i2c@7000c400 { | 267 | hdmi_ddc: i2c@7000c400 { |
256 | status = "okay"; | 268 | status = "okay"; |
257 | clock-frequency = <400000>; | 269 | clock-frequency = <100000>; |
258 | }; | 270 | }; |
259 | 271 | ||
260 | nvec { | 272 | nvec { |
@@ -369,13 +381,13 @@ | |||
369 | regulator-max-microvolt = <1800000>; | 381 | regulator-max-microvolt = <1800000>; |
370 | }; | 382 | }; |
371 | 383 | ||
372 | ldo7 { | 384 | hdmi_vdd_reg: ldo7 { |
373 | regulator-name = "+3.3vs_ldo7,avdd_hdmi"; | 385 | regulator-name = "+3.3vs_ldo7,avdd_hdmi"; |
374 | regulator-min-microvolt = <3300000>; | 386 | regulator-min-microvolt = <3300000>; |
375 | regulator-max-microvolt = <3300000>; | 387 | regulator-max-microvolt = <3300000>; |
376 | }; | 388 | }; |
377 | 389 | ||
378 | ldo8 { | 390 | hdmi_pll_reg: ldo8 { |
379 | regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; | 391 | regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; |
380 | regulator-min-microvolt = <1800000>; | 392 | regulator-min-microvolt = <1800000>; |
381 | regulator-max-microvolt = <1800000>; | 393 | regulator-max-microvolt = <1800000>; |