ARM: sunxi: add PLL4 support

This commit adds the PLL4 definition to the sun4i, sun5i and sun7i
device trees. PLL4 is compatible with PLL1.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>

1 files changed, 7 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index e46cfedde74c..e4a5d37a12f8 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -62,6 +62,13 @@
                         clocks = <&osc24M>;
                 };
 
+                pll4: pll4@01c20018 {
+                        #clock-cells = <0>;
+                        compatible = "allwinner,sun4i-pll1-clk";
+                        reg = <0x01c20018 0x4>;
+                        clocks = <&osc24M>;
+                };
+
                 /*
                  * This is a dummy clock, to be used as placeholder on
                  * other mux clocks when a specific parent clock is not