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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-03-10 08:34:36 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-06-15 09:17:08 -0400
commitf1741fda07fb1808ac58f7c97634cc28b8dd1727 (patch)
tree3455a483ecb36845a1bbe5d0ecad1e60d1995d5a /arch/arm/boot/dts/sun5i-a13.dtsi
parent39138bc60f90560ac79e76fb0971be5619ae32d7 (diff)
ARM: sunxi: dt: Add i2c controller nodes to the DTSI
The Allwinner A10 and A13 both have 3 i2c controller embedded. Add those to the common sunxi dtsi. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a13.dtsi')
-rw-r--r--arch/arm/boot/dts/sun5i-a13.dtsi27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index f34db19d17d7..31ebfd721195 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -217,5 +217,32 @@
217 clocks = <&apb1_gates 19>; 217 clocks = <&apb1_gates 19>;
218 status = "disabled"; 218 status = "disabled";
219 }; 219 };
220
221 i2c0: i2c@01c2ac00 {
222 compatible = "allwinner,sun4i-i2c";
223 reg = <0x01c2ac00 0x400>;
224 interrupts = <7>;
225 clocks = <&apb1_gates 0>;
226 clock-frequency = <100000>;
227 status = "disabled";
228 };
229
230 i2c1: i2c@01c2b000 {
231 compatible = "allwinner,sun4i-i2c";
232 reg = <0x01c2b000 0x400>;
233 interrupts = <8>;
234 clocks = <&apb1_gates 1>;
235 clock-frequency = <100000>;
236 status = "disabled";
237 };
238
239 i2c2: i2c@01c2b400 {
240 compatible = "allwinner,sun4i-i2c";
241 reg = <0x01c2b400 0x400>;
242 interrupts = <9>;
243 clocks = <&apb1_gates 2>;
244 clock-frequency = <100000>;
245 status = "disabled";
246 };
220 }; 247 };
221}; 248};