diff options
author | Olof Johansson <olof@lixom.net> | 2013-06-14 21:42:59 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2013-06-14 21:42:59 -0400 |
commit | 37177faefc22209deb547579d4c2dfd5d6bf30ab (patch) | |
tree | 6e2970f7d122ac93bc80000727fa6d0fa87d1e9c /arch/arm/boot/dts/sun5i-a13.dtsi | |
parent | 36d29fb57ccbf3cea2e46fea2ef5f0ffc22308e4 (diff) | |
parent | 39138bc60f90560ac79e76fb0971be5619ae32d7 (diff) |
Merge tag 'sunxi-dt-for-3.11' of git://github.com/mripard/linux into next/dt
From Maxime Ripard:
Allwinner SoCs DT additions for 3.11
- Switch to using the sun5i clocks for the A13
- Register the pio node as an interrupt controller
* tag 'sunxi-dt-for-3.11' of git://github.com/mripard/linux:
ARM: sunxi: dt: Register the pio node as interrupt controller
ARM: sun5i: Update the clock compatible strings
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a13.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun5i-a13.dtsi | 37 |
1 files changed, 14 insertions, 23 deletions
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index d2852547b572..027cb24438f8 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi | |||
@@ -99,20 +99,15 @@ | |||
99 | 99 | ||
100 | ahb_gates: ahb_gates@01c20060 { | 100 | ahb_gates: ahb_gates@01c20060 { |
101 | #clock-cells = <1>; | 101 | #clock-cells = <1>; |
102 | compatible = "allwinner,sun4i-ahb-gates-clk"; | 102 | compatible = "allwinner,sun5i-a13-ahb-gates-clk"; |
103 | reg = <0x01c20060 0x8>; | 103 | reg = <0x01c20060 0x8>; |
104 | clocks = <&ahb>; | 104 | clocks = <&ahb>; |
105 | clock-output-names = "ahb_usb0", "ahb_ehci0", | 105 | clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci", |
106 | "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", | 106 | "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0", |
107 | "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", | 107 | "ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram", |
108 | "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", | 108 | "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_stimer", |
109 | "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", | 109 | "ahb_ve", "ahb_lcd", "ahb_csi", "ahb_de_be", |
110 | "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", | 110 | "ahb_de_fe", "ahb_iep", "ahb_mali400"; |
111 | "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve", | ||
112 | "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0", | ||
113 | "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi", | ||
114 | "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0", | ||
115 | "ahb_de_fe1", "ahb_mp", "ahb_mali400"; | ||
116 | }; | 111 | }; |
117 | 112 | ||
118 | apb0: apb0@01c20054 { | 113 | apb0: apb0@01c20054 { |
@@ -124,15 +119,13 @@ | |||
124 | 119 | ||
125 | apb0_gates: apb0_gates@01c20068 { | 120 | apb0_gates: apb0_gates@01c20068 { |
126 | #clock-cells = <1>; | 121 | #clock-cells = <1>; |
127 | compatible = "allwinner,sun4i-apb0-gates-clk"; | 122 | compatible = "allwinner,sun5i-a13-apb0-gates-clk"; |
128 | reg = <0x01c20068 0x4>; | 123 | reg = <0x01c20068 0x4>; |
129 | clocks = <&apb0>; | 124 | clocks = <&apb0>; |
130 | clock-output-names = "apb0_codec", "apb0_spdif", | 125 | clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir"; |
131 | "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0", | ||
132 | "apb0_ir1", "apb0_keypad"; | ||
133 | }; | 126 | }; |
134 | 127 | ||
135 | /* dummy is pll62 */ | 128 | /* dummy is pll6 */ |
136 | apb1_mux: apb1_mux@01c20058 { | 129 | apb1_mux: apb1_mux@01c20058 { |
137 | #clock-cells = <0>; | 130 | #clock-cells = <0>; |
138 | compatible = "allwinner,sun4i-apb1-mux-clk"; | 131 | compatible = "allwinner,sun4i-apb1-mux-clk"; |
@@ -149,15 +142,11 @@ | |||
149 | 142 | ||
150 | apb1_gates: apb1_gates@01c2006c { | 143 | apb1_gates: apb1_gates@01c2006c { |
151 | #clock-cells = <1>; | 144 | #clock-cells = <1>; |
152 | compatible = "allwinner,sun4i-apb1-gates-clk"; | 145 | compatible = "allwinner,sun5i-a13-apb1-gates-clk"; |
153 | reg = <0x01c2006c 0x4>; | 146 | reg = <0x01c2006c 0x4>; |
154 | clocks = <&apb1>; | 147 | clocks = <&apb1>; |
155 | clock-output-names = "apb1_i2c0", "apb1_i2c1", | 148 | clock-output-names = "apb1_i2c0", "apb1_i2c1", |
156 | "apb1_i2c2", "apb1_can", "apb1_scr", | 149 | "apb1_i2c2", "apb1_uart1", "apb1_uart3"; |
157 | "apb1_ps20", "apb1_ps21", "apb1_uart0", | ||
158 | "apb1_uart1", "apb1_uart2", "apb1_uart3", | ||
159 | "apb1_uart4", "apb1_uart5", "apb1_uart6", | ||
160 | "apb1_uart7"; | ||
161 | }; | 150 | }; |
162 | }; | 151 | }; |
163 | 152 | ||
@@ -178,8 +167,10 @@ | |||
178 | pio: pinctrl@01c20800 { | 167 | pio: pinctrl@01c20800 { |
179 | compatible = "allwinner,sun5i-a13-pinctrl"; | 168 | compatible = "allwinner,sun5i-a13-pinctrl"; |
180 | reg = <0x01c20800 0x400>; | 169 | reg = <0x01c20800 0x400>; |
170 | interrupts = <28>; | ||
181 | clocks = <&apb0_gates 5>; | 171 | clocks = <&apb0_gates 5>; |
182 | gpio-controller; | 172 | gpio-controller; |
173 | interrupt-controller; | ||
183 | #address-cells = <1>; | 174 | #address-cells = <1>; |
184 | #size-cells = <0>; | 175 | #size-cells = <0>; |
185 | #gpio-cells = <3>; | 176 | #gpio-cells = <3>; |