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authorEmilio López <emilio@elopez.com.ar>2013-12-22 22:32:35 -0500
committerEmilio López <emilio@elopez.com.ar>2013-12-28 15:28:23 -0500
commitec5589f7a33956ea3671d198ff170dc51ff2145d (patch)
tree4031df901b9dc065272b9b5a0eb7f9d29cccc21e /arch/arm/boot/dts/sun5i-a10s.dtsi
parent6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae (diff)
ARM: sunxi: add PLL4 support
This commit adds the PLL4 definition to the sun4i, sun5i and sun7i device trees. PLL4 is compatible with PLL1. Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a10s.dtsi')
-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 52476742a104..c3f4eed3691b 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -63,6 +63,13 @@
63 clocks = <&osc24M>; 63 clocks = <&osc24M>;
64 }; 64 };
65 65
66 pll4: pll4@01c20018 {
67 #clock-cells = <0>;
68 compatible = "allwinner,sun4i-pll1-clk";
69 reg = <0x01c20018 0x4>;
70 clocks = <&osc24M>;
71 };
72
66 /* dummy is 200M */ 73 /* dummy is 200M */
67 cpu: cpu@01c20054 { 74 cpu: cpu@01c20054 {
68 #clock-cells = <0>; 75 #clock-cells = <0>;