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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-07-16 05:28:58 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-26 04:51:18 -0400
commit29bb805475effce2522e0ae60fbfbcd135f363e6 (patch)
tree00886a3655d174531ad6b05237539fd7bf254240 /arch/arm/boot/dts/sun5i-a10s.dtsi
parent82abe5294aeadc42508c7944f3a9aec0eece214c (diff)
ARM: sun5i: dt: Use the A10s gates in the DTSI
The A10s has only a subset of the A10 gates. Now that the clock driver has support for this gates set, switch to it in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Emilio López <emilio@elopez.com.ar>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a10s.dtsi')
-rw-r--r--arch/arm/boot/dts/sun5i-a10s.dtsi36
1 files changed, 14 insertions, 22 deletions
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index ee0ff9ba1bca..3b4a0574f068 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -95,20 +95,16 @@
95 95
96 ahb_gates: ahb_gates@01c20060 { 96 ahb_gates: ahb_gates@01c20060 {
97 #clock-cells = <1>; 97 #clock-cells = <1>;
98 compatible = "allwinner,sun4i-ahb-gates-clk"; 98 compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
99 reg = <0x01c20060 0x8>; 99 reg = <0x01c20060 0x8>;
100 clocks = <&ahb>; 100 clocks = <&ahb>;
101 clock-output-names = "ahb_usb0", "ahb_ehci0", 101 clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci",
102 "ahb_ohci0", "ahb_ehci1", "ahb_ohci1", "ahb_ss", 102 "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",
103 "ahb_dma", "ahb_bist", "ahb_mmc0", "ahb_mmc1", 103 "ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram",
104 "ahb_mmc2", "ahb_mmc3", "ahb_ms", "ahb_nand", 104 "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1",
105 "ahb_sdram", "ahb_ace", "ahb_emac", "ahb_ts", 105 "ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve",
106 "ahb_spi0", "ahb_spi1", "ahb_spi2", "ahb_spi3", 106 "ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi",
107 "ahb_pata", "ahb_sata", "ahb_gps", "ahb_ve", 107 "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400";
108 "ahb_tvd", "ahb_tve0", "ahb_tve1", "ahb_lcd0",
109 "ahb_lcd1", "ahb_csi0", "ahb_csi1", "ahb_hdmi",
110 "ahb_de_be0", "ahb_de_be1", "ahb_de_fe0",
111 "ahb_de_fe1", "ahb_mp", "ahb_mali400";
112 }; 108 };
113 109
114 apb0: apb0@01c20054 { 110 apb0: apb0@01c20054 {
@@ -120,12 +116,11 @@
120 116
121 apb0_gates: apb0_gates@01c20068 { 117 apb0_gates: apb0_gates@01c20068 {
122 #clock-cells = <1>; 118 #clock-cells = <1>;
123 compatible = "allwinner,sun4i-apb0-gates-clk"; 119 compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
124 reg = <0x01c20068 0x4>; 120 reg = <0x01c20068 0x4>;
125 clocks = <&apb0>; 121 clocks = <&apb0>;
126 clock-output-names = "apb0_codec", "apb0_spdif", 122 clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio",
127 "apb0_ac97", "apb0_iis", "apb0_pio", "apb0_ir0", 123 "apb0_ir", "apb0_keypad";
128 "apb0_ir1", "apb0_keypad";
129 }; 124 };
130 125
131 /* dummy is pll62 */ 126 /* dummy is pll62 */
@@ -145,15 +140,12 @@
145 140
146 apb1_gates: apb1_gates@01c2006c { 141 apb1_gates: apb1_gates@01c2006c {
147 #clock-cells = <1>; 142 #clock-cells = <1>;
148 compatible = "allwinner,sun4i-apb1-gates-clk"; 143 compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
149 reg = <0x01c2006c 0x4>; 144 reg = <0x01c2006c 0x4>;
150 clocks = <&apb1>; 145 clocks = <&apb1>;
151 clock-output-names = "apb1_i2c0", "apb1_i2c1", 146 clock-output-names = "apb1_i2c0", "apb1_i2c1",
152 "apb1_i2c2", "apb1_can", "apb1_scr", 147 "apb1_i2c2", "apb1_uart0", "apb1_uart1",
153 "apb1_ps20", "apb1_ps21", "apb1_uart0", 148 "apb1_uart2", "apb1_uart3";
154 "apb1_uart1", "apb1_uart2", "apb1_uart3",
155 "apb1_uart4", "apb1_uart5", "apb1_uart6",
156 "apb1_uart7";
157 }; 149 };
158 }; 150 };
159 151