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authorGabriel FERNANDEZ <gabriel.fernandez@st.com>2014-05-20 09:22:00 -0400
committerMaxime Coquelin <maxime.coquelin@st.com>2014-05-21 08:27:12 -0400
commitf317e689cba38b1d5cf9dd5763e7f91ed5168d63 (patch)
tree300006bce84f470581857acb33cc23cf4c87d17f /arch/arm/boot/dts/stih415.dtsi
parentd0128b7d3056fe0315c56c76c8f7d77900e768a0 (diff)
ARM: STi: DT: STiH415: 415 DT Entry for clockgen A0/1/10/11/12
Patch adds DT entries for clockgen A0/1/10/11/12 Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih415.dtsi')
-rw-r--r--arch/arm/boot/dts/stih415.dtsi10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi
index 20425a7f3ed0..d6f254f302fe 100644
--- a/arch/arm/boot/dts/stih415.dtsi
+++ b/arch/arm/boot/dts/stih415.dtsi
@@ -82,7 +82,7 @@
82 interrupts = <0 197 0>; 82 interrupts = <0 197 0>;
83 pinctrl-names = "default"; 83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_serial2>; 84 pinctrl-0 = <&pinctrl_serial2>;
85 clocks = <&CLKS_ICN_REG_0>; 85 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
86 }; 86 };
87 87
88 /* SBC comms block ASCs in SASG1 */ 88 /* SBC comms block ASCs in SASG1 */
@@ -100,7 +100,7 @@
100 compatible = "st,comms-ssc4-i2c"; 100 compatible = "st,comms-ssc4-i2c";
101 reg = <0xfed40000 0x110>; 101 reg = <0xfed40000 0x110>;
102 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 102 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
103 clocks = <&CLKS_ICN_REG_0>; 103 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
104 clock-names = "ssc"; 104 clock-names = "ssc";
105 clock-frequency = <400000>; 105 clock-frequency = <400000>;
106 pinctrl-names = "default"; 106 pinctrl-names = "default";
@@ -113,7 +113,7 @@
113 compatible = "st,comms-ssc4-i2c"; 113 compatible = "st,comms-ssc4-i2c";
114 reg = <0xfed41000 0x110>; 114 reg = <0xfed41000 0x110>;
115 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 115 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
116 clocks = <&CLKS_ICN_REG_0>; 116 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
117 clock-names = "ssc"; 117 clock-names = "ssc";
118 clock-frequency = <400000>; 118 clock-frequency = <400000>;
119 pinctrl-names = "default"; 119 pinctrl-names = "default";
@@ -170,7 +170,7 @@
170 pinctrl-names = "default"; 170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_mii0>; 171 pinctrl-0 = <&pinctrl_mii0>;
172 clock-names = "stmmaceth"; 172 clock-names = "stmmaceth";
173 clocks = <&CLKS_GMAC0_PHY>; 173 clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>;
174 }; 174 };
175 175
176 ethernet1: dwmac@fef08000 { 176 ethernet1: dwmac@fef08000 {
@@ -193,7 +193,7 @@
193 pinctrl-names = "default"; 193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_mii1>; 194 pinctrl-0 = <&pinctrl_mii1>;
195 clock-names = "stmmaceth"; 195 clock-names = "stmmaceth";
196 clocks = <&CLKS_ETH1_PHY>; 196 clocks = <&clk_s_a0_ls CLK_ETH1_PHY>;
197 }; 197 };
198 198
199 rc: rc@fe518000 { 199 rc: rc@fe518000 {