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authorLinus Walleij <linus.walleij@linaro.org>2013-11-13 07:46:57 -0500
committerLinus Walleij <linus.walleij@linaro.org>2013-11-26 15:01:55 -0500
commit1e66235330ff1bdc372647f47a414a3d3952dffb (patch)
treed84371d9c2d3af186c524ef1041cea95e6f7e9cb /arch/arm/boot/dts/ste-snowball.dts
parent96fee13f0f11a7479a06e4c44aaa89ee77b9fafb (diff)
ARM: ux500: move MMC/SD/SDIO pin control to the device tree
This moves the static, device-tied pin control configuration out of the board file board-mop500-pins.c and into the device tree. Add entries for SDI1 and SDI2 on the Snowball so that the WLAN pins on SDI1 can be used further on, and the unused pins on SDI2 can be put to sleep. Cc: Lee Jones <lee.jones@linaro.org> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/ste-snowball.dts')
-rw-r--r--arch/arm/boot/dts/ste-snowball.dts43
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index f8df43e0791d..c2cb3ea637dc 100644
--- a/arch/arm/boot/dts/ste-snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -137,6 +137,9 @@
137 mmc-cap-mmc-highspeed; 137 mmc-cap-mmc-highspeed;
138 vmmc-supply = <&ab8500_ldo_aux3_reg>; 138 vmmc-supply = <&ab8500_ldo_aux3_reg>;
139 vqmmc-supply = <&vmmci>; 139 vqmmc-supply = <&vmmci>;
140 pinctrl-names = "default", "sleep";
141 pinctrl-0 = <&sdi0_default_mode>;
142 pinctrl-1 = <&sdi0_sleep_mode>;
140 143
141 cd-gpios = <&gpio6 26 0x4>; // 218 144 cd-gpios = <&gpio6 26 0x4>; // 218
142 cd-inverted; 145 cd-inverted;
@@ -144,6 +147,27 @@
144 status = "okay"; 147 status = "okay";
145 }; 148 };
146 149
150 // WLAN SDIO channel
151 sdi1_per2@80118000 {
152 arm,primecell-periphid = <0x10480180>;
153 max-frequency = <100000000>;
154 bus-width = <4>;
155 pinctrl-names = "default", "sleep";
156 pinctrl-0 = <&sdi1_default_mode>;
157 pinctrl-1 = <&sdi1_sleep_mode>;
158
159 status = "okay";
160 };
161
162 // Unused PoP eMMC - register and put it to sleep by default */
163 sdi2_per3@80005000 {
164 arm,primecell-periphid = <0x10480180>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&sdi2_sleep_mode>;
167
168 status = "okay";
169 };
170
147 // On-board eMMC 171 // On-board eMMC
148 sdi4_per2@80114000 { 172 sdi4_per2@80114000 {
149 arm,primecell-periphid = <0x10480180>; 173 arm,primecell-periphid = <0x10480180>;
@@ -151,6 +175,9 @@
151 bus-width = <8>; 175 bus-width = <8>;
152 mmc-cap-mmc-highspeed; 176 mmc-cap-mmc-highspeed;
153 vmmc-supply = <&ab8500_ldo_aux2_reg>; 177 vmmc-supply = <&ab8500_ldo_aux2_reg>;
178 pinctrl-names = "default", "sleep";
179 pinctrl-0 = <&sdi4_default_mode>;
180 pinctrl-1 = <&sdi4_sleep_mode>;
154 181
155 status = "okay"; 182 status = "okay";
156 }; 183 };
@@ -300,5 +327,21 @@
300 }; 327 };
301 }; 328 };
302 }; 329 };
330
331 pinctrl {
332 sdi0 {
333 sdi0_default_mode: sdi0_default {
334 snowball_mux {
335 ste,function = "mc0";
336 ste,pins = "mc0dat31dir_a_1";
337 };
338 snowball_cfg1 {
339 ste,pins = "GPIO21_AB3"; /* DAT31DIR */
340 ste,config = <&out_hi>;
341 };
342
343 };
344 };
345 };
303 }; 346 };
304}; 347};