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authorDinh Nguyen <dinguyen@altera.com>2013-08-21 16:28:49 -0400
committerOlof Johansson <olof@lixom.net>2013-08-29 15:59:02 -0400
commit620f5e1cbfc16aa1bd39c2c5386aee4d00850641 (patch)
tree189266e03455c40216b7daef35d4d128b9802ce2 /arch/arm/boot/dts/socfpga.dtsi
parent13960b47dc1df695f8537c32a0e0ce5ae5d4eee4 (diff)
dts: Rename DW APB timer compatible strings
"dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the DW APB timer, just fed by different clocks. Thus, deprecate both "dw-apb-timer-osc" and "dw-apb-timer-sp" in lieu of "dw-apb-timer". Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> CC: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ian.campbell@citrix.com> CC: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> CC: Jamie Iles <jamie@jamieiles.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Pavel Machek <pavel@denx.de> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Olof Johansson <olof@lixom.net> v3: - Split out a separate that cleans up the timer entries and clock information. - Clearly states which binding is deprecated in the bindings doc. v2: - Deprecate the "dw-apb-timer-osc" and "dw-apb-timer-sp" but maintain backwards compatibility in the driver.
Diffstat (limited to 'arch/arm/boot/dts/socfpga.dtsi')
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index bee62a2cf6d6..e273fa993b8c 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -476,25 +476,25 @@
476 }; 476 };
477 477
478 timer0: timer0@ffc08000 { 478 timer0: timer0@ffc08000 {
479 compatible = "snps,dw-apb-timer-sp"; 479 compatible = "snps,dw-apb-timer";
480 interrupts = <0 167 4>; 480 interrupts = <0 167 4>;
481 reg = <0xffc08000 0x1000>; 481 reg = <0xffc08000 0x1000>;
482 }; 482 };
483 483
484 timer1: timer1@ffc09000 { 484 timer1: timer1@ffc09000 {
485 compatible = "snps,dw-apb-timer-sp"; 485 compatible = "snps,dw-apb-timer";
486 interrupts = <0 168 4>; 486 interrupts = <0 168 4>;
487 reg = <0xffc09000 0x1000>; 487 reg = <0xffc09000 0x1000>;
488 }; 488 };
489 489
490 timer2: timer2@ffd00000 { 490 timer2: timer2@ffd00000 {
491 compatible = "snps,dw-apb-timer-osc"; 491 compatible = "snps,dw-apb-timer";
492 interrupts = <0 169 4>; 492 interrupts = <0 169 4>;
493 reg = <0xffd00000 0x1000>; 493 reg = <0xffd00000 0x1000>;
494 }; 494 };
495 495
496 timer3: timer3@ffd01000 { 496 timer3: timer3@ffd01000 {
497 compatible = "snps,dw-apb-timer-osc"; 497 compatible = "snps,dw-apb-timer";
498 interrupts = <0 170 4>; 498 interrupts = <0 170 4>;
499 reg = <0xffd01000 0x1000>; 499 reg = <0xffd01000 0x1000>;
500 }; 500 };