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authorMagnus Damm <damm@opensource.se>2013-03-29 04:49:37 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-04-02 21:50:43 -0400
commit3cc828fdb32281cc8166d3a40bee32b90ce3cad8 (patch)
treee746b6b78ef65353b20839c18e9ee5cc519f4a4c /arch/arm/boot/dts/r8a7790-lager.dts
parent15351a7a22c207b2e9ce83b01782a2324006014a (diff)
ARM: shmobile: Initial r8a7790 Lager board support
Lager base board support making use of 2 GiB of memory, the r8a7790 SoC with the SCIF0 serial port and CA15 with ARM architected timer. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7790-lager.dts')
-rw-r--r--arch/arm/boot/dts/r8a7790-lager.dts31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
new file mode 100644
index 000000000000..09a84fce89d6
--- /dev/null
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -0,0 +1,31 @@
1/*
2 * Device Tree Source for the Lager board
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/dts-v1/;
12/include/ "r8a7790.dtsi"
13
14/ {
15 model = "Lager";
16 compatible = "renesas,lager", "renesas,r8a7790";
17
18 chosen {
19 bootargs = "console=ttySC6,115200 ignore_loglevel";
20 };
21
22 memory@40000000 {
23 device_type = "memory";
24 reg = <0 0x40000000 0 0x80000000>;
25 };
26
27 lbsc {
28 #address-cells = <1>;
29 #size-cells = <1>;
30 };
31};