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authorHaojian Zhuang <haojian.zhuang@gmail.com>2012-08-04 11:57:38 -0400
committerHaojian Zhuang <haojian.zhuang@gmail.com>2012-08-16 04:17:00 -0400
commita03d8b1e4606be10c0fedf1ccabe22dc3a5060f9 (patch)
treeb8bf5e898c654b4f17bed019fcc1b0ec7038d67e /arch/arm/boot/dts/pxa910.dtsi
parentc2b7e05c753156dfba3240c59c400d557c5c8746 (diff)
ARM: mmp: enable tauros2 cache in pxa910
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/pxa910.dtsi')
-rw-r--r--arch/arm/boot/dts/pxa910.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi
index aebf32de73b4..a3be44d86bcd 100644
--- a/arch/arm/boot/dts/pxa910.dtsi
+++ b/arch/arm/boot/dts/pxa910.dtsi
@@ -25,6 +25,11 @@
25 interrupt-parent = <&intc>; 25 interrupt-parent = <&intc>;
26 ranges; 26 ranges;
27 27
28 L2: l2-cache {
29 compatible = "marvell,tauros2-cache";
30 marvell,tauros2-cache-features = <0x3>;
31 };
32
28 axi@d4200000 { /* AXI */ 33 axi@d4200000 { /* AXI */
29 compatible = "mrvl,axi-bus", "simple-bus"; 34 compatible = "mrvl,axi-bus", "simple-bus";
30 #address-cells = <1>; 35 #address-cells = <1>;