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authorLinus Torvalds <torvalds@linux-foundation.org>2013-10-03 00:48:32 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-10-03 00:48:32 -0400
commite6e7fb1ffc875adf2dd36d4a135b8d7addda0aea (patch)
tree1d7371ef6d6ffb0287cbed7b644daa2b992a0c2e /arch/arm/boot/dts/prima2.dtsi
parent164a2c58227bcd509db95920e849e914e9512204 (diff)
parent6a98b2ffc7cf8a84a18d8666185c29b7e0e631e9 (diff)
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "We have a fairly large batch of fixes this time around, mostly just due to various platforms all having a fix or two more than usual. Worth pointing out are: - A fix for EDMA on Davinci/OMAP where channel allocation broke with the DT conversion. Due to some miscommunication we didn't understand the impact of the breakage, so we were pushing back on it for 3.12, but it sounds like it's actually breaking quite a few people out there. - A bunch of fixes for Marvell platforms, some straggling fixes for merge window fallout and some fixes for a couple of the platforms (Netgear RN102 in particular). - A fix for a race between multi-cluster power management and cpu hotplug on Versatile Express. And a bunch of other smaller fixes that all add up. We'll be switching over into stricter regressions-only mode from here on out" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits) ARM: multi_v7_defconfig: add SDHCI for i.MX bus: mvebu-mbus: Fix optional pcie-mem/io-aperture properties ARM: mvebu: add missing DT Mbus ranges and relocate PCIe DT nodes for RN102 ARM: at91: sam9g45: shutdown ddr1 too when rebooting MAINTAINERS: ARM: SIRF: use kernel.org mail box MAINTAINERS: ARM: SIRF: add missed drivers into maintain list ARM: edma: Fix clearing of unused list for DT DMA resources ARM: vexpress: tc2: fix hotplug/idle/kexec race on cluster power down ARM: dts: sirf: fix interrupt and dma prop of VIP for prima2 and atlas6 ARM: dts: sirf: fix the ranges of peri-iobrg of prima2 ARM: dts: makefile: build atlas6-evb.dtb for ARCH_ATLAS6 ARM: dts: sirf: fix fifosize, clks, dma channels for UART ARM: mvebu: Add DT entry for ReadyNAS 102 to use gpio-poweroff driver ARM: mvebu: fix ReadyNAS 102 Power button GPIO to make it active high ARM: mach-integrator: Add stub for pci_v3_early_init() for !CONFIG_PCI ARM: shmobile: Remove #gpio-ranges-cells DT property gpio: rcar: Remove #gpio-range-cells DT property usage ARM: shmobile: armadillo: fixup ether pinctrl naming ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format ...
Diffstat (limited to 'arch/arm/boot/dts/prima2.dtsi')
-rw-r--r--arch/arm/boot/dts/prima2.dtsi27
1 files changed, 23 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index bbeb623fc2c6..27ed9f5144bc 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -171,7 +171,8 @@
171 compatible = "simple-bus"; 171 compatible = "simple-bus";
172 #address-cells = <1>; 172 #address-cells = <1>;
173 #size-cells = <1>; 173 #size-cells = <1>;
174 ranges = <0xb0000000 0xb0000000 0x180000>; 174 ranges = <0xb0000000 0xb0000000 0x180000>,
175 <0x56000000 0x56000000 0x1b00000>;
175 176
176 timer@b0020000 { 177 timer@b0020000 {
177 compatible = "sirf,prima2-tick"; 178 compatible = "sirf,prima2-tick";
@@ -196,25 +197,32 @@
196 uart0: uart@b0050000 { 197 uart0: uart@b0050000 {
197 cell-index = <0>; 198 cell-index = <0>;
198 compatible = "sirf,prima2-uart"; 199 compatible = "sirf,prima2-uart";
199 reg = <0xb0050000 0x10000>; 200 reg = <0xb0050000 0x1000>;
200 interrupts = <17>; 201 interrupts = <17>;
202 fifosize = <128>;
201 clocks = <&clks 13>; 203 clocks = <&clks 13>;
204 sirf,uart-dma-rx-channel = <21>;
205 sirf,uart-dma-tx-channel = <2>;
202 }; 206 };
203 207
204 uart1: uart@b0060000 { 208 uart1: uart@b0060000 {
205 cell-index = <1>; 209 cell-index = <1>;
206 compatible = "sirf,prima2-uart"; 210 compatible = "sirf,prima2-uart";
207 reg = <0xb0060000 0x10000>; 211 reg = <0xb0060000 0x1000>;
208 interrupts = <18>; 212 interrupts = <18>;
213 fifosize = <32>;
209 clocks = <&clks 14>; 214 clocks = <&clks 14>;
210 }; 215 };
211 216
212 uart2: uart@b0070000 { 217 uart2: uart@b0070000 {
213 cell-index = <2>; 218 cell-index = <2>;
214 compatible = "sirf,prima2-uart"; 219 compatible = "sirf,prima2-uart";
215 reg = <0xb0070000 0x10000>; 220 reg = <0xb0070000 0x1000>;
216 interrupts = <19>; 221 interrupts = <19>;
222 fifosize = <128>;
217 clocks = <&clks 15>; 223 clocks = <&clks 15>;
224 sirf,uart-dma-rx-channel = <6>;
225 sirf,uart-dma-tx-channel = <7>;
218 }; 226 };
219 227
220 usp0: usp@b0080000 { 228 usp0: usp@b0080000 {
@@ -222,7 +230,10 @@
222 compatible = "sirf,prima2-usp"; 230 compatible = "sirf,prima2-usp";
223 reg = <0xb0080000 0x10000>; 231 reg = <0xb0080000 0x10000>;
224 interrupts = <20>; 232 interrupts = <20>;
233 fifosize = <128>;
225 clocks = <&clks 28>; 234 clocks = <&clks 28>;
235 sirf,usp-dma-rx-channel = <17>;
236 sirf,usp-dma-tx-channel = <18>;
226 }; 237 };
227 238
228 usp1: usp@b0090000 { 239 usp1: usp@b0090000 {
@@ -230,7 +241,10 @@
230 compatible = "sirf,prima2-usp"; 241 compatible = "sirf,prima2-usp";
231 reg = <0xb0090000 0x10000>; 242 reg = <0xb0090000 0x10000>;
232 interrupts = <21>; 243 interrupts = <21>;
244 fifosize = <128>;
233 clocks = <&clks 29>; 245 clocks = <&clks 29>;
246 sirf,usp-dma-rx-channel = <14>;
247 sirf,usp-dma-tx-channel = <15>;
234 }; 248 };
235 249
236 usp2: usp@b00a0000 { 250 usp2: usp@b00a0000 {
@@ -238,7 +252,10 @@
238 compatible = "sirf,prima2-usp"; 252 compatible = "sirf,prima2-usp";
239 reg = <0xb00a0000 0x10000>; 253 reg = <0xb00a0000 0x10000>;
240 interrupts = <22>; 254 interrupts = <22>;
255 fifosize = <128>;
241 clocks = <&clks 30>; 256 clocks = <&clks 30>;
257 sirf,usp-dma-rx-channel = <10>;
258 sirf,usp-dma-tx-channel = <11>;
242 }; 259 };
243 260
244 dmac0: dma-controller@b00b0000 { 261 dmac0: dma-controller@b00b0000 {
@@ -261,6 +278,8 @@
261 compatible = "sirf,prima2-vip"; 278 compatible = "sirf,prima2-vip";
262 reg = <0xb00C0000 0x10000>; 279 reg = <0xb00C0000 0x10000>;
263 clocks = <&clks 31>; 280 clocks = <&clks 31>;
281 interrupts = <14>;
282 sirf,vip-dma-rx-channel = <16>;
264 }; 283 };
265 284
266 spi0: spi@b00d0000 { 285 spi0: spi@b00d0000 {