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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-10-18 02:10:21 -0400
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-11-18 18:51:07 -0500
commitee867d8eab1ffba8ace677eb6b62fba8c45d2e85 (patch)
tree4eb0dec3a450b7ece7f891a8bd55b0245d490eba /arch/arm/boot/dts/pm9g45.dts
parentc58c0c5acceb8acd3d447483a744e8a4a7c27f26 (diff)
ARM: at91: add Ronetix pm9g45 board support
CPU Module with ATMEL AT91SAM9G45 http://www.ronetix.at/pm9g45.html Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'arch/arm/boot/dts/pm9g45.dts')
-rw-r--r--arch/arm/boot/dts/pm9g45.dts144
1 files changed, 144 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/pm9g45.dts b/arch/arm/boot/dts/pm9g45.dts
new file mode 100644
index 000000000000..b0c258dd19ed
--- /dev/null
+++ b/arch/arm/boot/dts/pm9g45.dts
@@ -0,0 +1,144 @@
1/*
2 * pm9g45.dts - Device Tree file for Ronetix pm9g45 board
3 *
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2.
7 */
8/dts-v1/;
9/include/ "at91sam9g45.dtsi"
10
11/ {
12 model = "Ronetix pm9g45";
13 compatible = "ronetix,pm9g45", "atmel,at91sam9g45", "atmel,at91sam9";
14
15 chosen {
16 bootargs = "console=ttyS0,115200";
17 };
18
19 memory {
20 reg = <0x70000000 0x8000000>;
21 };
22
23 clocks {
24 #address-cells = <1>;
25 #size-cells = <1>;
26 ranges;
27
28 main_clock: clock@0 {
29 compatible = "atmel,osc", "fixed-clock";
30 clock-frequency = <12000000>;
31 };
32 };
33
34 ahb {
35 apb {
36 dbgu: serial@ffffee00 {
37 status = "okay";
38 };
39
40 pinctrl@fffff200 {
41
42 board {
43 pinctrl_board_nand: nand0-board {
44 atmel,pins =
45 <3 3 0x0 0x1 /* PD3 gpio RDY pin pull_up*/
46 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
47 };
48 };
49 };
50
51 macb0: ethernet@fffbc000 {
52 phy-mode = "rmii";
53 status = "okay";
54 };
55 };
56
57 nand0: nand@40000000 {
58 nand-bus-width = <8>;
59 nand-ecc-mode = "soft";
60 nand-on-flash-bbt;
61 pinctrl-0 = <&pinctrl_board_nand>;
62
63 gpios = <&pioD 3 0
64 &pioC 14 0
65 0
66 >;
67
68 status = "okay";
69
70 at91bootstrap@0 {
71 label = "at91bootstrap";
72 reg = <0x0 0x20000>;
73 };
74
75 barebox@20000 {
76 label = "barebox";
77 reg = <0x20000 0x40000>;
78 };
79
80 bareboxenv@60000 {
81 label = "bareboxenv";
82 reg = <0x60000 0x1A0000>;
83 };
84
85 kernel@200000 {
86 label = "bareboxenv2";
87 reg = <0x200000 0x300000>;
88 };
89
90 kernel@500000 {
91 label = "root";
92 reg = <0x500000 0x400000>;
93 };
94
95 data@900000 {
96 label = "data";
97 reg = <0x900000 0x8340000>;
98 };
99 };
100
101 usb0: ohci@00700000 {
102 status = "okay";
103 num-ports = <2>;
104 };
105
106 usb1: ehci@00800000 {
107 status = "okay";
108 };
109 };
110
111 leds {
112 compatible = "gpio-leds";
113
114 led0 {
115 label = "led0";
116 gpios = <&pioD 0 1>;
117 linux,default-trigger = "nand-disk";
118 };
119
120 led1 {
121 label = "led1";
122 gpios = <&pioD 31 0>;
123 linux,default-trigger = "heartbeat";
124 };
125 };
126
127 gpio_keys {
128 compatible = "gpio-keys";
129 #address-cells = <1>;
130 #size-cells = <0>;
131
132 right {
133 label = "SW4";
134 gpios = <&pioE 7 1>;
135 linux,code = <106>;
136 };
137
138 up {
139 label = "SW3";
140 gpios = <&pioE 8 1>;
141 linux,code = <103>;
142 };
143 };
144};