diff options
author | Alexandre Pereira da Silva <aletes.xgr@gmail.com> | 2012-06-12 09:34:12 -0400 |
---|---|---|
committer | Roland Stigge <stigge@antcom.de> | 2012-06-14 10:16:19 -0400 |
commit | 2e0b5a375288d624feb16b58a3af662338a63641 (patch) | |
tree | 91dacd1d0576e89c19d5a60b562d28b2c06b4db8 /arch/arm/boot/dts/phy3250.dts | |
parent | 1440837440a31672973eedaf632f54c9dfc08c4d (diff) |
ARM: LPC32xx: Add dt settings to the at25 node
Add the reg, cs-gpios and max-frequencies that are needed for spi
device registry in phy3250.
Adds also the pl022 internal transfers details via dt
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
Diffstat (limited to 'arch/arm/boot/dts/phy3250.dts')
-rw-r--r-- | arch/arm/boot/dts/phy3250.dts | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/phy3250.dts b/arch/arm/boot/dts/phy3250.dts index f3bf1493afb0..802ec5b2fd00 100644 --- a/arch/arm/boot/dts/phy3250.dts +++ b/arch/arm/boot/dts/phy3250.dts | |||
@@ -133,8 +133,29 @@ | |||
133 | }; | 133 | }; |
134 | 134 | ||
135 | ssp0: ssp@20084000 { | 135 | ssp0: ssp@20084000 { |
136 | #address-cells = <1>; | ||
137 | #size-cells = <0>; | ||
138 | pl022,num-chipselects = <1>; | ||
139 | cs-gpios = <&gpio 3 5 0>; | ||
140 | |||
136 | eeprom: at25@0 { | 141 | eeprom: at25@0 { |
142 | pl022,hierarchy = <0>; | ||
143 | pl022,interface = <0>; | ||
144 | pl022,slave-tx-disable = <0>; | ||
145 | pl022,com-mode = <0>; | ||
146 | pl022,rx-level-trig = <1>; | ||
147 | pl022,tx-level-trig = <1>; | ||
148 | pl022,ctrl-len = <11>; | ||
149 | pl022,wait-state = <0>; | ||
150 | pl022,duplex = <0>; | ||
151 | |||
152 | at25,byte-len = <0x8000>; | ||
153 | at25,addr-mode = <2>; | ||
154 | at25,page-size = <64>; | ||
155 | |||
137 | compatible = "atmel,at25"; | 156 | compatible = "atmel,at25"; |
157 | reg = <0>; | ||
158 | spi-max-frequency = <5000000>; | ||
138 | }; | 159 | }; |
139 | }; | 160 | }; |
140 | 161 | ||