ARM: dts: OMAP5 / DRA7: switch over to interrupts-extended property for UART

We've had deeper idle states working on omaps for few years now,
but only in the legacy mode. When booted with device tree, the
wake-up events did not have a chance to work until commit
3e6cee1786a1 ("pinctrl: single: Add support for wake-up interrupts")
that recently got merged. In addition to that we also needed
commit 79d9701559a9 ("of/irq: create interrupts-extended property")
that's now also merged.

Note that there's no longer need to specify the wake-up bit in
the pinctrl settings, the request_irq on the wake-up pin takes
care of that.

Signed-off-by: Nishanth Menon <nm@ti.com>

1 files changed, 6 insertions, 6 deletions

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index ea08ad874f82..b840db0d16d1 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -451,7 +451,7 @@
                 uart1: serial@4806a000 {
                         compatible = "ti,omap4-uart";
                         reg = <0x4806a000 0x100>;
-                        interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
                         ti,hwmods = "uart1";
                         clock-frequency = <48000000>;
                 };
@@ -459,7 +459,7 @@
                 uart2: serial@4806c000 {
                         compatible = "ti,omap4-uart";
                         reg = <0x4806c000 0x100>;
-                        interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts-extended = <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
                         ti,hwmods = "uart2";
                         clock-frequency = <48000000>;
                 };
@@ -467,7 +467,7 @@
                 uart3: serial@48020000 {
                         compatible = "ti,omap4-uart";
                         reg = <0x48020000 0x100>;
-                        interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts-extended = <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
                         ti,hwmods = "uart3";
                         clock-frequency = <48000000>;
                 };
@@ -475,7 +475,7 @@
                 uart4: serial@4806e000 {
                         compatible = "ti,omap4-uart";
                         reg = <0x4806e000 0x100>;
-                        interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
                         ti,hwmods = "uart4";
                         clock-frequency = <48000000>;
                 };
@@ -483,7 +483,7 @@
                 uart5: serial@48066000 {
                         compatible = "ti,omap4-uart";
                         reg = <0x48066000 0x100>;
-                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts-extended = <&gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
                         ti,hwmods = "uart5";
                         clock-frequency = <48000000>;
                 };
@@ -491,7 +491,7 @@
                 uart6: serial@48068000 {
                         compatible = "ti,omap4-uart";
                         reg = <0x48068000 0x100>;
-                        interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupts-extended = <&gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
                         ti,hwmods = "uart6";
                         clock-frequency = <48000000>;
                 };