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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2013-02-19 06:59:24 -0500
committerBenoit Cousson <benoit.cousson@linaro.org>2013-04-08 18:21:17 -0400
commit0129c16cb561c655db3e940a90b2765c531e5f2c (patch)
treed0fc1e7c98393199ce230695cd4787b2d2d5e58e /arch/arm/boot/dts/omap5.dtsi
parentba1829bcaa7c480c0e61de5c00417e87dda75b65 (diff)
ARM: dts: OMAP5: Update the timer and GIC nodes for HYP kernel support
To be able to run kernel in HYP mode, virtual timer and GIC node information needs to be populated. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/omap5.dtsi')
-rw-r--r--arch/arm/boot/dts/omap5.dtsi8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 470124413c73..ff09720b4b1b 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -46,7 +46,9 @@
46 compatible = "arm,armv7-timer"; 46 compatible = "arm,armv7-timer";
47 /* PPI secure/nonsecure IRQ, active low level-sensitive */ 47 /* PPI secure/nonsecure IRQ, active low level-sensitive */
48 interrupts = <1 13 0x308>, 48 interrupts = <1 13 0x308>,
49 <1 14 0x308>; 49 <1 14 0x308>,
50 <1 11 0x308>,
51 <1 10 0x308>;
50 clock-frequency = <6144000>; 52 clock-frequency = <6144000>;
51 }; 53 };
52 54
@@ -55,7 +57,9 @@
55 interrupt-controller; 57 interrupt-controller;
56 #interrupt-cells = <3>; 58 #interrupt-cells = <3>;
57 reg = <0x48211000 0x1000>, 59 reg = <0x48211000 0x1000>,
58 <0x48212000 0x1000>; 60 <0x48212000 0x1000>,
61 <0x48214000 0x2000>,
62 <0x48216000 0x2000>;
59 }; 63 };
60 64
61 /* 65 /*