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authorJon Hunter <jon-hunter@ti.com>2012-10-19 10:59:00 -0400
committerBenoit Cousson <b-cousson@ti.com>2012-10-29 11:56:32 -0400
commitfab8ad0b2b5f2b6d25c6020a61bf3339e53fec61 (patch)
tree8a0ddc775d0feae45f97b8d79a3cdd2b239ad9aa /arch/arm/boot/dts/omap4.dtsi
parent4c94ac29b5c1f0cef2281df97609f2cbcc09cf9c (diff)
ARM: dts: OMAP: Add timer nodes
Add the 12 GP timers nodes present in OMAP2. Add the 12 GP timers nodes present in OMAP3. Add the 11 GP timers nodes present in OMAP4. Add the 7 GP timers nodes present in AM33xx. Add documentation for timer properties specific to OMAP. Thanks to Vaibhav Hiremath for creating the AM33xx timer nodes. I have modified Vaibhav's original nodes adding information on which timers support a PWM output. V5 changes: - Updated timer register sizes for OMAP2/3/4. - Modified AM335x timer register size to be 1KB instead of 4KB to align with HWMOD. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-Reviewed-&-Tested-By: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/omap4.dtsi')
-rw-r--r--arch/arm/boot/dts/omap4.dtsi86
1 files changed, 86 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 2ab6e68ccbf7..d3a82e0c3804 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -433,5 +433,91 @@
433 ranges; 433 ranges;
434 ti,hwmods = "ocp2scp_usb_phy"; 434 ti,hwmods = "ocp2scp_usb_phy";
435 }; 435 };
436
437 timer1: timer@4a318000 {
438 compatible = "ti,omap2-timer";
439 reg = <0x4a318000 0x80>;
440 interrupts = <0 37 0x4>;
441 ti,hwmods = "timer1";
442 ti,timer-alwon;
443 };
444
445 timer2: timer@48032000 {
446 compatible = "ti,omap2-timer";
447 reg = <0x48032000 0x80>;
448 interrupts = <0 38 0x4>;
449 ti,hwmods = "timer2";
450 };
451
452 timer3: timer@48034000 {
453 compatible = "ti,omap2-timer";
454 reg = <0x48034000 0x80>;
455 interrupts = <0 39 0x4>;
456 ti,hwmods = "timer3";
457 };
458
459 timer4: timer@48036000 {
460 compatible = "ti,omap2-timer";
461 reg = <0x48036000 0x80>;
462 interrupts = <0 40 0x4>;
463 ti,hwmods = "timer4";
464 };
465
466 timer5: timer@49038000 {
467 compatible = "ti,omap2-timer";
468 reg = <0x49038000 0x80>;
469 interrupts = <0 41 0x4>;
470 ti,hwmods = "timer5";
471 ti,timer-dsp;
472 };
473
474 timer6: timer@4903a000 {
475 compatible = "ti,omap2-timer";
476 reg = <0x4903a000 0x80>;
477 interrupts = <0 42 0x4>;
478 ti,hwmods = "timer6";
479 ti,timer-dsp;
480 };
481
482 timer7: timer@4903c000 {
483 compatible = "ti,omap2-timer";
484 reg = <0x4903c000 0x80>;
485 interrupts = <0 43 0x4>;
486 ti,hwmods = "timer7";
487 ti,timer-dsp;
488 };
489
490 timer8: timer@4903e000 {
491 compatible = "ti,omap2-timer";
492 reg = <0x4903e000 0x80>;
493 interrupts = <0 44 0x4>;
494 ti,hwmods = "timer8";
495 ti,timer-pwm;
496 ti,timer-dsp;
497 };
498
499 timer9: timer@4803e000 {
500 compatible = "ti,omap2-timer";
501 reg = <0x4803e000 0x80>;
502 interrupts = <0 45 0x4>;
503 ti,hwmods = "timer9";
504 ti,timer-pwm;
505 };
506
507 timer10: timer@48086000 {
508 compatible = "ti,omap2-timer";
509 reg = <0x48086000 0x80>;
510 interrupts = <0 46 0x4>;
511 ti,hwmods = "timer10";
512 ti,timer-pwm;
513 };
514
515 timer11: timer@48088000 {
516 compatible = "ti,omap2-timer";
517 reg = <0x48088000 0x80>;
518 interrupts = <0 47 0x4>;
519 ti,hwmods = "timer11";
520 ti,timer-pwm;
521 };
436 }; 522 };
437}; 523};