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authorJavier Martinez Canillas <javier.martinez@collabora.co.uk>2013-10-07 11:12:24 -0400
committerBenoit Cousson <bcousson@baylibre.com>2013-10-11 15:06:43 -0400
commit339e834fe06a2367ab8dcc18e57e810997ac9750 (patch)
tree396cea58086fccf5b607815ab5e4762cfc66c1bf /arch/arm/boot/dts/omap3-igep0020.dts
parentaa496bde78b9e6d1124b69b9f49acf4ee7d6b282 (diff)
ARM: dts: omap3-igep0020: Add HS USB Host support
Add device nodes for the HS USB Host port 1, USB PHY and its required regulator and also pin mux setup for HS USB1 pins. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3-igep0020.dts')
-rw-r--r--arch/arm/boot/dts/omap3-igep0020.dts49
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index eedf0d8b42d5..35346f2473b6 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -55,6 +55,47 @@
55 regulator-name = "vdd33a"; 55 regulator-name = "vdd33a";
56 regulator-always-on; 56 regulator-always-on;
57 }; 57 };
58
59 /* HS USB Port 1 Power */
60 hsusb1_power: hsusb1_power_reg {
61 compatible = "regulator-fixed";
62 regulator-name = "hsusb1_vbus";
63 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
65 gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */
66 startup-delay-us = <70000>;
67 };
68
69 /* HS USB Host PHY on PORT 1 */
70 hsusb1_phy: hsusb1_phy {
71 compatible = "usb-nop-xceiv";
72 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
73 vcc-supply = <&hsusb1_power>;
74 };
75};
76
77&omap3_pmx_core {
78 pinctrl-names = "default";
79 pinctrl-0 = <
80 &hsusbb1_pins
81 >;
82
83 hsusbb1_pins: pinmux_hsusbb1_pins {
84 pinctrl-single,pins = <
85 0x5aa (PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
86 0x5a8 (PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
87 0x5bc (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */
88 0x5be (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */
89 0x5ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */
90 0x5ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */
91 0x5b0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */
92 0x5b2 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */
93 0x5b4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */
94 0x5b6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */
95 0x5b8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */
96 0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
97 >;
98 };
58}; 99};
59 100
60&leds_pins { 101&leds_pins {
@@ -166,3 +207,11 @@
166 smsc,save-mac-address; 207 smsc,save-mac-address;
167 }; 208 };
168}; 209};
210
211&usbhshost {
212 port1-mode = "ehci-phy";
213};
214
215&usbhsehci {
216 phys = <&hsusb1_phy>;
217};