ARM: dts: Split omap3 pinmux core device

The omap3_pmx_core pinmux device in the device tree handles the system
controller module (SCM) PADCONFS fonction. Its control registers are
split in two distinct areas, with other SCM registers in-between. Those
other registers can't thus be requested by other drivers as the memory
region gets reserved by the pinmux driver.

Split the omap3_pmx_core device tree node in two for the two memory
regions. The second region address and size depends on the SoC model.

The change in omap3.dtsi fixes an "external abort on non-linefetch" when
doing

cat /sys/kernel/debug/pinctrl/.../pins

on a Nokia N900.

Note that the core2 padconf region is different for 3430 vs 3630,
and does not exist on 3517 as noted by Nishanth Menon <nm@ti.com>.

Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-By: Sebastian Reichel <sre@debian.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: updated for 3430 vs 3630 core2 based on Nishant's patch]
Signed-off-by: Tony Lindgren <tony@atomide.com>

1 files changed, 29 insertions, 23 deletions

diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index 1c7e74d2d2bc..25a2b5f652fd 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -66,28 +66,10 @@
 &omap3_pmx_core {
         pinctrl-names = "default";
         pinctrl-0 = <
-                &hsusbb1_pins
                 &tfp410_pins
                 &dss_pins
         >;
 
-        hsusbb1_pins: pinmux_hsusbb1_pins {
-                pinctrl-single,pins = <
-                        0x5aa (PIN_OUTPUT | MUX_MODE3)          /* etk_ctl.hsusb1_clk */
-                        0x5a8 (PIN_OUTPUT | MUX_MODE3)          /* etk_clk.hsusb1_stp */
-                        0x5bc (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d8.hsusb1_dir */
-                        0x5be (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d9.hsusb1_nxt */
-                        0x5ac (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d0.hsusb1_data0 */
-                        0x5ae (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d1.hsusb1_data1 */
-                        0x5b0 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d2.hsusb1_data2 */
-                        0x5b2 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d3.hsusb1_data7 */
-                        0x5b4 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d4.hsusb1_data4 */
-                        0x5b6 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d5.hsusb1_data5 */
-                        0x5b8 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d6.hsusb1_data6 */
-                        0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d7.hsusb1_data3 */
-                >;
-        };
-
         tfp410_pins: tfp410_dvi_pins {
                 pinctrl-single,pins = <
                         0x196 (PIN_OUTPUT | MUX_MODE4)   /* hdq_sio.gpio_170 */
@@ -128,12 +110,36 @@
         };
 };
 
-&leds_pins {
-        pinctrl-single,pins = <
-                0x5c4 (PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
-                0x5c6 (PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
-                0x5c8 (PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
+&omap3_pmx_core2 {
+        pinctrl-names = "default";
+        pinctrl-0 = <
+                &hsusbb1_pins
         >;
+
+        hsusbb1_pins: pinmux_hsusbb1_pins {
+                pinctrl-single,pins = <
+                        OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3)            /* etk_ctl.hsusb1_clk */
+                        OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3)            /* etk_clk.hsusb1_stp */
+                        OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d8.hsusb1_dir */
+                        OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d9.hsusb1_nxt */
+                        OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d0.hsusb1_data0 */
+                        OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d1.hsusb1_data1 */
+                        OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d2.hsusb1_data2 */
+                        OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d3.hsusb1_data7 */
+                        OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d4.hsusb1_data4 */
+                        OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d5.hsusb1_data5 */
+                        OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d6.hsusb1_data6 */
+                        OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d7.hsusb1_data3 */
+                >;
+        };
+
+        leds_pins: pinmux_leds_pins {
+                pinctrl-single,pins = <
+                        OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
+                        OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
+                        OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
+                >;
+        };
 };
 
 &i2c3 {