ARM: Kirkwood: DT versions of OpenRD boards

Create DTS files to describe the Marvell OpenRD boards.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1399836639-1918-1-git-send-email-andrew@lunn.ch
Tested-by: Francois Lorrain <francois.lorrain@gmail.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

1 files changed, 58 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/kirkwood-openrd-ultimate.dts b/arch/arm/boot/dts/kirkwood-openrd-ultimate.dts
new file mode 100644
index 000000000000..9f12f8b53e24
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-openrd-ultimate.dts
@@ -0,0 +1,58 @@
+/*
+ * Marvell OpenRD Ultimate Board Description
+ *
+ * Andrew Lunn <andrew@lunn.ch>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ * This file contains the definitions that are specific to OpenRD
+ * ultimate variant of the Marvell Kirkwood Development Board.
+ */
+
+/dts-v1/;
+
+#include "kirkwood-openrd.dtsi"
+
+/ {
+        model = "OpenRD Ultimate";
+        compatible = "marvell,openrd-ultimate", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+        ocp@f1000000 {
+                i2c@11000 {
+                        status = "okay";
+                        clock-frequency = <400000>;
+
+                        cs42l51: cs42l51@4a {
+                                compatible = "cirrus,cs42l51";
+                                reg = <0x4a>;
+                        };
+                };
+        };
+};
+
+&mdio {
+        status = "okay";
+
+        ethphy0: ethernet-phy@0 {
+                reg = <0>;
+        };
+        ethphy1: ethernet-phy@1 {
+                reg = <1>;
+        };
+};
+
+&eth0 {
+        status = "okay";
+        ethernet0-port@0 {
+                phy-handle = <&ethphy0>;
+        };
+};
+
+&eth1 {
+        status = "okay";
+        ethernet1-port@0 {
+                phy-handle = <&ethphy1>;
+        };
+};