diff options
author | Markus Pargmann <mpa@pengutronix.de> | 2014-01-17 04:07:42 -0500 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2014-02-10 03:27:39 -0500 |
commit | 98ea6ad2edd21f953a43bd27182000a18a44dc20 (patch) | |
tree | ddd6f160da42c7330803a0cec9234d77faf99f53 /arch/arm/boot/dts/imx6qdl.dtsi | |
parent | fb06d65ccc6a09cade95a159d17fe69c44f8e67e (diff) |
ARM: dts: imx6: use imx51-ssi
imx51-ssi and imx21-ssi are different IPs. imx51-ssi supports online
reconfiguration and needs this for correct interaction with SDMA. This
patch adds imx51-ssi before each imx21-ssi for all imx6 SoCs.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 2dd30ecf0dc1..947e463a2b2f 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi | |||
@@ -251,7 +251,9 @@ | |||
251 | }; | 251 | }; |
252 | 252 | ||
253 | ssi1: ssi@02028000 { | 253 | ssi1: ssi@02028000 { |
254 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; | 254 | compatible = "fsl,imx6q-ssi", |
255 | "fsl,imx51-ssi", | ||
256 | "fsl,imx21-ssi"; | ||
255 | reg = <0x02028000 0x4000>; | 257 | reg = <0x02028000 0x4000>; |
256 | interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; | 258 | interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; |
257 | clocks = <&clks 178>; | 259 | clocks = <&clks 178>; |
@@ -264,7 +266,9 @@ | |||
264 | }; | 266 | }; |
265 | 267 | ||
266 | ssi2: ssi@0202c000 { | 268 | ssi2: ssi@0202c000 { |
267 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; | 269 | compatible = "fsl,imx6q-ssi", |
270 | "fsl,imx51-ssi", | ||
271 | "fsl,imx21-ssi"; | ||
268 | reg = <0x0202c000 0x4000>; | 272 | reg = <0x0202c000 0x4000>; |
269 | interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; | 273 | interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; |
270 | clocks = <&clks 179>; | 274 | clocks = <&clks 179>; |
@@ -277,7 +281,9 @@ | |||
277 | }; | 281 | }; |
278 | 282 | ||
279 | ssi3: ssi@02030000 { | 283 | ssi3: ssi@02030000 { |
280 | compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; | 284 | compatible = "fsl,imx6q-ssi", |
285 | "fsl,imx51-ssi", | ||
286 | "fsl,imx21-ssi"; | ||
281 | reg = <0x02030000 0x4000>; | 287 | reg = <0x02030000 0x4000>; |
282 | interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; | 288 | interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; |
283 | clocks = <&clks 180>; | 289 | clocks = <&clks 180>; |