diff options
| author | Troy Kisky <troy.kisky@boundarydevices.com> | 2013-12-16 20:13:01 -0500 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2014-02-09 08:29:30 -0500 |
| commit | fde909387b7b630b099cc230061f2c796b7ef1cd (patch) | |
| tree | 4208b7705052c24ae68374b3f77a2ae449c1e4ff /arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | |
| parent | a48a1e527e0a0705f283860524ad4771727e8cc5 (diff) | |
ARM: dts: imx6qdl-sabrelite: fix ENET group
GPIO16 is used for I2C3, not ENET_REF_CLK.
Also, remove pull-ups from tx pins, and ENET_MDIO
which has an external pull-up.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabrelite.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index d443eb77eae0..0e7d314419e0 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | |||
| @@ -169,22 +169,21 @@ | |||
| 169 | 169 | ||
| 170 | pinctrl_enet: enetgrp { | 170 | pinctrl_enet: enetgrp { |
| 171 | fsl,pins = < | 171 | fsl,pins = < |
| 172 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | 172 | MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 |
| 173 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | 173 | MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 |
| 174 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | 174 | MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 |
| 175 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | 175 | MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 |
| 176 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | 176 | MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 |
| 177 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | 177 | MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 |
| 178 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | 178 | MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 |
| 179 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | 179 | MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 |
| 180 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | 180 | MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 |
| 181 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | 181 | MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 |
| 182 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | 182 | MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 |
| 183 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | 183 | MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 |
| 184 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | 184 | MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 |
| 185 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | 185 | MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 |
| 186 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 186 | MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 |
| 187 | MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 | ||
| 188 | /* Phy reset */ | 187 | /* Phy reset */ |
| 189 | MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0 | 188 | MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0 |
| 190 | >; | 189 | >; |