diff options
author | Huang Shijie <b32955@freescale.com> | 2013-05-08 23:29:03 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2013-06-17 04:04:20 -0400 |
commit | faacc290eeaf28f24a2ff5cb1ec033e6c9f3811d (patch) | |
tree | 380a479b1d3a65c1db7812653b1eaa1470bae9fe /arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | |
parent | e6c3781186aa219add3e3aeda302306addc80896 (diff) |
ARM: dts: add SPI/NOR for mx6q{dl}-sabreauto boards
Since the SPI/NOR has pin conflict with the WEIM NOR,
we disable the spi/nor by default.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabreauto.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index 7b561fbbfb03..d6baa51dc83c 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | |||
@@ -16,6 +16,22 @@ | |||
16 | }; | 16 | }; |
17 | }; | 17 | }; |
18 | 18 | ||
19 | &ecspi1 { | ||
20 | fsl,spi-num-chipselects = <1>; | ||
21 | cs-gpios = <&gpio3 19 0>; | ||
22 | pinctrl-names = "default"; | ||
23 | pinctrl-0 = <&pinctrl_ecspi1_1>; | ||
24 | status = "disabled"; /* pin conflict with WEIM NOR */ | ||
25 | |||
26 | flash: m25p80@0 { | ||
27 | #address-cells = <1>; | ||
28 | #size-cells = <1>; | ||
29 | compatible = "st,m25p32"; | ||
30 | spi-max-frequency = <20000000>; | ||
31 | reg = <0>; | ||
32 | }; | ||
33 | }; | ||
34 | |||
19 | &fec { | 35 | &fec { |
20 | pinctrl-names = "default"; | 36 | pinctrl-names = "default"; |
21 | pinctrl-0 = <&pinctrl_enet_2>; | 37 | pinctrl-0 = <&pinctrl_enet_2>; |