diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2013-03-14 08:09:02 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2013-04-09 10:52:54 -0400 |
commit | b700c1198395a9664f73c43611e3ec1399055b4f (patch) | |
tree | a71b52efacb2f33cdeac1ddc9c3ed6f5e5c6012b /arch/arm/boot/dts/imx27.dtsi | |
parent | 4efccadd3a87d5679f55b67a51cbc73c47bb108d (diff) |
ARM: i.MX27: Add clocks to GPT devicetree nodes
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx27.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx27.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 387aab6937e3..ff4bd4873edf 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi | |||
@@ -69,18 +69,24 @@ | |||
69 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 69 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; |
70 | reg = <0x10003000 0x1000>; | 70 | reg = <0x10003000 0x1000>; |
71 | interrupts = <26>; | 71 | interrupts = <26>; |
72 | clocks = <&clks 46>, <&clks 61>; | ||
73 | clock-names = "ipg", "per"; | ||
72 | }; | 74 | }; |
73 | 75 | ||
74 | gpt2: timer@10004000 { | 76 | gpt2: timer@10004000 { |
75 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 77 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; |
76 | reg = <0x10004000 0x1000>; | 78 | reg = <0x10004000 0x1000>; |
77 | interrupts = <25>; | 79 | interrupts = <25>; |
80 | clocks = <&clks 45>, <&clks 61>; | ||
81 | clock-names = "ipg", "per"; | ||
78 | }; | 82 | }; |
79 | 83 | ||
80 | gpt3: timer@10005000 { | 84 | gpt3: timer@10005000 { |
81 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 85 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; |
82 | reg = <0x10005000 0x1000>; | 86 | reg = <0x10005000 0x1000>; |
83 | interrupts = <24>; | 87 | interrupts = <24>; |
88 | clocks = <&clks 44>, <&clks 61>; | ||
89 | clock-names = "ipg", "per"; | ||
84 | }; | 90 | }; |
85 | 91 | ||
86 | uart1: serial@1000a000 { | 92 | uart1: serial@1000a000 { |
@@ -226,12 +232,16 @@ | |||
226 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 232 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; |
227 | reg = <0x10019000 0x1000>; | 233 | reg = <0x10019000 0x1000>; |
228 | interrupts = <4>; | 234 | interrupts = <4>; |
235 | clocks = <&clks 43>, <&clks 61>; | ||
236 | clock-names = "ipg", "per"; | ||
229 | }; | 237 | }; |
230 | 238 | ||
231 | gpt5: timer@1001a000 { | 239 | gpt5: timer@1001a000 { |
232 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 240 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; |
233 | reg = <0x1001a000 0x1000>; | 241 | reg = <0x1001a000 0x1000>; |
234 | interrupts = <3>; | 242 | interrupts = <3>; |
243 | clocks = <&clks 42>, <&clks 61>; | ||
244 | clock-names = "ipg", "per"; | ||
235 | }; | 245 | }; |
236 | 246 | ||
237 | uart5: serial@1001b000 { | 247 | uart5: serial@1001b000 { |
@@ -266,6 +276,8 @@ | |||
266 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; | 276 | compatible = "fsl,imx27-gpt", "fsl,imx1-gpt"; |
267 | reg = <0x1001f000 0x1000>; | 277 | reg = <0x1001f000 0x1000>; |
268 | interrupts = <2>; | 278 | interrupts = <2>; |
279 | clocks = <&clks 41>, <&clks 61>; | ||
280 | clock-names = "ipg", "per"; | ||
269 | }; | 281 | }; |
270 | }; | 282 | }; |
271 | 283 | ||