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authorSeungwon Jeon <tgih.jun@samsung.com>2015-03-26 12:52:02 -0400
committerKukjin Kim <kgene@kernel.org>2015-03-26 12:52:02 -0400
commit4f59ebed8945c7102b960113093bb2e5497d2fab (patch)
tree260b72d2e0b7ac4ab8acfbf8d4ed4a8bd06331f3 /arch/arm/boot/dts/exynos5420-pinctrl.dtsi
parentfa87bd4360ab4244467571f4235ccb2b362fea24 (diff)
ARM: dts: Add HS400 support for exynos5420 and exynos5800
HS400 timing values are added for SMDK5420, exynos5420-peach-pit and exynos5800-peach-pi boards. This also adds RCLK GPIO line, this gpio should be in pull-down state. This also enables HS400 on peach-pi and this updates the clock frequency to 800MHz to be set as input clock to controller. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> [alim.akhtar@samsung.com: addressed review comments] Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kukjin Kim <kgene@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos5420-pinctrl.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5420-pinctrl.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index ba686e40eac7..8b153166ebdb 100644
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -201,6 +201,13 @@
201 samsung,pin-drv = <3>; 201 samsung,pin-drv = <3>;
202 }; 202 };
203 203
204 sd0_rclk: sd0-rclk {
205 samsung,pins = "gpc0-7";
206 samsung,pin-function = <2>;
207 samsung,pin-pud = <1>;
208 samsung,pin-drv = <3>;
209 };
210
204 sd1_cmd: sd1-cmd { 211 sd1_cmd: sd1-cmd {
205 samsung,pins = "gpc1-1"; 212 samsung,pins = "gpc1-1";
206 samsung,pin-function = <2>; 213 samsung,pin-function = <2>;