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authorJason Cooper <jason@lakedaemon.net>2013-12-11 15:29:13 -0500
committerJason Cooper <jason@lakedaemon.net>2013-12-12 10:00:43 -0500
commitb31b32119abefd540c71beb93ebb059577748c85 (patch)
tree4a098ae0851f59fccfa1a20ac27311dd1764edcb /arch/arm/boot/dts/dove.dtsi
parent20bba5883acf79460dff047cf45b6fb8089168b2 (diff)
ARM: dove: sort DT nodes by address
Prevent future (unnecessary) merge conflicts Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/dove.dtsi')
-rw-r--r--arch/arm/boot/dts/dove.dtsi496
1 files changed, 248 insertions, 248 deletions
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index db24b41a5264..852db2860015 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -107,60 +107,29 @@
107 0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */ 107 0xffffe000 MBUS_ID(0x03, 0x01) 0 0x0000800 /* CESA SRAM 2k */
108 0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */ 108 0xfffff000 MBUS_ID(0x0d, 0x00) 0 0x0000800>; /* PMU SRAM 2k */
109 109
110 mbusc: mbus-ctrl@20000 { 110 spi0: spi-ctrl@10600 {
111 compatible = "marvell,mbus-controller"; 111 compatible = "marvell,orion-spi";
112 reg = <0x20000 0x80>, <0x800100 0x8>; 112 #address-cells = <1>;
113 }; 113 #size-cells = <0>;
114 114 cell-index = <0>;
115 timer: timer@20300 { 115 interrupts = <6>;
116 compatible = "marvell,orion-timer"; 116 reg = <0x10600 0x28>;
117 reg = <0x20300 0x20>;
118 interrupt-parent = <&bridge_intc>;
119 interrupts = <1>, <2>;
120 clocks = <&core_clk 0>; 117 clocks = <&core_clk 0>;
118 pinctrl-0 = <&pmx_spi0>;
119 pinctrl-names = "default";
120 status = "disabled";
121 }; 121 };
122 122
123 intc: main-interrupt-ctrl@20200 { 123 i2c0: i2c-ctrl@11000 {
124 compatible = "marvell,orion-intc"; 124 compatible = "marvell,mv64xxx-i2c";
125 interrupt-controller; 125 reg = <0x11000 0x20>;
126 #interrupt-cells = <1>; 126 #address-cells = <1>;
127 reg = <0x20200 0x10>, <0x20210 0x10>; 127 #size-cells = <0>;
128 }; 128 interrupts = <11>;
129 129 clock-frequency = <400000>;
130 bridge_intc: bridge-interrupt-ctrl@20110 { 130 timeout-ms = <1000>;
131 compatible = "marvell,orion-bridge-intc";
132 interrupt-controller;
133 #interrupt-cells = <1>;
134 reg = <0x20110 0x8>;
135 interrupts = <0>;
136 marvell,#interrupts = <5>;
137 };
138
139 pmu_intc: pmu-interrupt-ctrl@d0050 {
140 compatible = "marvell,dove-pmu-intc";
141 interrupt-controller;
142 #interrupt-cells = <1>;
143 reg = <0xd0050 0x8>;
144 interrupts = <33>;
145 marvell,#interrupts = <7>;
146 };
147
148 core_clk: core-clocks@d0214 {
149 compatible = "marvell,dove-core-clock";
150 reg = <0xd0214 0x4>;
151 #clock-cells = <1>;
152 };
153
154 gate_clk: clock-gating-ctrl@d0038 {
155 compatible = "marvell,dove-gating-clock";
156 reg = <0xd0038 0x4>;
157 clocks = <&core_clk 0>; 131 clocks = <&core_clk 0>;
158 #clock-cells = <1>; 132 status = "disabled";
159 };
160
161 thermal: thermal-diode@d001c {
162 compatible = "marvell,dove-thermal";
163 reg = <0xd001c 0x0c>, <0xd005c 0x08>;
164 }; 133 };
165 134
166 uart0: serial@12000 { 135 uart0: serial@12000 {
@@ -201,34 +170,213 @@
201 status = "disabled"; 170 status = "disabled";
202 }; 171 };
203 172
204 gpio0: gpio-ctrl@d0400 { 173 spi1: spi-ctrl@14600 {
205 compatible = "marvell,orion-gpio"; 174 compatible = "marvell,orion-spi";
206 #gpio-cells = <2>; 175 #address-cells = <1>;
207 gpio-controller; 176 #size-cells = <0>;
208 reg = <0xd0400 0x20>; 177 cell-index = <1>;
209 ngpios = <32>; 178 interrupts = <5>;
179 reg = <0x14600 0x28>;
180 clocks = <&core_clk 0>;
181 status = "disabled";
182 };
183
184 mbusc: mbus-ctrl@20000 {
185 compatible = "marvell,mbus-controller";
186 reg = <0x20000 0x80>, <0x800100 0x8>;
187 };
188
189 bridge_intc: bridge-interrupt-ctrl@20110 {
190 compatible = "marvell,orion-bridge-intc";
210 interrupt-controller; 191 interrupt-controller;
211 #interrupt-cells = <2>; 192 #interrupt-cells = <1>;
212 interrupts = <12>, <13>, <14>, <60>; 193 reg = <0x20110 0x8>;
194 interrupts = <0>;
195 marvell,#interrupts = <5>;
213 }; 196 };
214 197
215 gpio1: gpio-ctrl@d0420 { 198 intc: main-interrupt-ctrl@20200 {
216 compatible = "marvell,orion-gpio"; 199 compatible = "marvell,orion-intc";
217 #gpio-cells = <2>;
218 gpio-controller;
219 reg = <0xd0420 0x20>;
220 ngpios = <32>;
221 interrupt-controller; 200 interrupt-controller;
222 #interrupt-cells = <2>; 201 #interrupt-cells = <1>;
223 interrupts = <61>; 202 reg = <0x20200 0x10>, <0x20210 0x10>;
224 }; 203 };
225 204
226 gpio2: gpio-ctrl@e8400 { 205 timer: timer@20300 {
227 compatible = "marvell,orion-gpio"; 206 compatible = "marvell,orion-timer";
228 #gpio-cells = <2>; 207 reg = <0x20300 0x20>;
229 gpio-controller; 208 interrupt-parent = <&bridge_intc>;
230 reg = <0xe8400 0x0c>; 209 interrupts = <1>, <2>;
231 ngpios = <8>; 210 clocks = <&core_clk 0>;
211 };
212
213 crypto: crypto-engine@30000 {
214 compatible = "marvell,orion-crypto";
215 reg = <0x30000 0x10000>,
216 <0xffffe000 0x800>;
217 reg-names = "regs", "sram";
218 interrupts = <31>;
219 clocks = <&gate_clk 15>;
220 status = "okay";
221 };
222
223 ehci0: usb-host@50000 {
224 compatible = "marvell,orion-ehci";
225 reg = <0x50000 0x1000>;
226 interrupts = <24>;
227 clocks = <&gate_clk 0>;
228 status = "okay";
229 };
230
231 ehci1: usb-host@51000 {
232 compatible = "marvell,orion-ehci";
233 reg = <0x51000 0x1000>;
234 interrupts = <25>;
235 clocks = <&gate_clk 1>;
236 status = "okay";
237 };
238
239 xor0: dma-engine@60800 {
240 compatible = "marvell,orion-xor";
241 reg = <0x60800 0x100
242 0x60a00 0x100>;
243 clocks = <&gate_clk 23>;
244 status = "okay";
245
246 channel0 {
247 interrupts = <39>;
248 dmacap,memcpy;
249 dmacap,xor;
250 };
251
252 channel1 {
253 interrupts = <40>;
254 dmacap,memcpy;
255 dmacap,xor;
256 };
257 };
258
259 xor1: dma-engine@60900 {
260 compatible = "marvell,orion-xor";
261 reg = <0x60900 0x100
262 0x60b00 0x100>;
263 clocks = <&gate_clk 24>;
264 status = "okay";
265
266 channel0 {
267 interrupts = <42>;
268 dmacap,memcpy;
269 dmacap,xor;
270 };
271
272 channel1 {
273 interrupts = <43>;
274 dmacap,memcpy;
275 dmacap,xor;
276 };
277 };
278
279 sdio1: sdio-host@90000 {
280 compatible = "marvell,dove-sdhci";
281 reg = <0x90000 0x100>;
282 interrupts = <36>, <38>;
283 clocks = <&gate_clk 9>;
284 pinctrl-0 = <&pmx_sdio1>;
285 pinctrl-names = "default";
286 status = "disabled";
287 };
288
289 eth: ethernet-ctrl@72000 {
290 compatible = "marvell,orion-eth";
291 #address-cells = <1>;
292 #size-cells = <0>;
293 reg = <0x72000 0x4000>;
294 clocks = <&gate_clk 2>;
295 marvell,tx-checksum-limit = <1600>;
296 status = "disabled";
297
298 ethernet-port@0 {
299 device_type = "network";
300 compatible = "marvell,orion-eth-port";
301 reg = <0>;
302 interrupts = <29>;
303 /* overwrite MAC address in bootloader */
304 local-mac-address = [00 00 00 00 00 00];
305 phy-handle = <&ethphy>;
306 };
307 };
308
309 mdio: mdio-bus@72004 {
310 compatible = "marvell,orion-mdio";
311 #address-cells = <1>;
312 #size-cells = <0>;
313 reg = <0x72004 0x84>;
314 interrupts = <30>;
315 clocks = <&gate_clk 2>;
316 status = "disabled";
317
318 ethphy: ethernet-phy {
319 device_type = "ethernet-phy";
320 /* set phy address in board file */
321 };
322 };
323
324 sdio0: sdio-host@92000 {
325 compatible = "marvell,dove-sdhci";
326 reg = <0x92000 0x100>;
327 interrupts = <35>, <37>;
328 clocks = <&gate_clk 8>;
329 pinctrl-0 = <&pmx_sdio0>;
330 pinctrl-names = "default";
331 status = "disabled";
332 };
333
334 sata0: sata-host@a0000 {
335 compatible = "marvell,orion-sata";
336 reg = <0xa0000 0x2400>;
337 interrupts = <62>;
338 clocks = <&gate_clk 3>;
339 nr-ports = <1>;
340 status = "disabled";
341 };
342
343 audio0: audio-controller@b0000 {
344 compatible = "marvell,dove-audio";
345 reg = <0xb0000 0x2210>;
346 interrupts = <19>, <20>;
347 clocks = <&gate_clk 12>;
348 clock-names = "internal";
349 status = "disabled";
350 };
351
352 audio1: audio-controller@b4000 {
353 compatible = "marvell,dove-audio";
354 reg = <0xb4000 0x2210>;
355 interrupts = <21>, <22>;
356 clocks = <&gate_clk 13>;
357 clock-names = "internal";
358 status = "disabled";
359 };
360
361 thermal: thermal-diode@d001c {
362 compatible = "marvell,dove-thermal";
363 reg = <0xd001c 0x0c>, <0xd005c 0x08>;
364 };
365
366 gate_clk: clock-gating-ctrl@d0038 {
367 compatible = "marvell,dove-gating-clock";
368 reg = <0xd0038 0x4>;
369 clocks = <&core_clk 0>;
370 #clock-cells = <1>;
371 };
372
373 pmu_intc: pmu-interrupt-ctrl@d0050 {
374 compatible = "marvell,dove-pmu-intc";
375 interrupt-controller;
376 #interrupt-cells = <1>;
377 reg = <0xd0050 0x8>;
378 interrupts = <33>;
379 marvell,#interrupts = <7>;
232 }; 380 };
233 381
234 pinctrl: pin-ctrl@d0200 { 382 pinctrl: pin-ctrl@d0200 {
@@ -422,85 +570,32 @@
422 }; 570 };
423 }; 571 };
424 572
425 spi0: spi-ctrl@10600 { 573 core_clk: core-clocks@d0214 {
426 compatible = "marvell,orion-spi"; 574 compatible = "marvell,dove-core-clock";
427 #address-cells = <1>; 575 reg = <0xd0214 0x4>;
428 #size-cells = <0>; 576 #clock-cells = <1>;
429 cell-index = <0>;
430 interrupts = <6>;
431 reg = <0x10600 0x28>;
432 clocks = <&core_clk 0>;
433 pinctrl-0 = <&pmx_spi0>;
434 pinctrl-names = "default";
435 status = "disabled";
436 };
437
438 spi1: spi-ctrl@14600 {
439 compatible = "marvell,orion-spi";
440 #address-cells = <1>;
441 #size-cells = <0>;
442 cell-index = <1>;
443 interrupts = <5>;
444 reg = <0x14600 0x28>;
445 clocks = <&core_clk 0>;
446 status = "disabled";
447 };
448
449 i2c0: i2c-ctrl@11000 {
450 compatible = "marvell,mv64xxx-i2c";
451 reg = <0x11000 0x20>;
452 #address-cells = <1>;
453 #size-cells = <0>;
454 interrupts = <11>;
455 clock-frequency = <400000>;
456 timeout-ms = <1000>;
457 clocks = <&core_clk 0>;
458 status = "disabled";
459 };
460
461 ehci0: usb-host@50000 {
462 compatible = "marvell,orion-ehci";
463 reg = <0x50000 0x1000>;
464 interrupts = <24>;
465 clocks = <&gate_clk 0>;
466 status = "okay";
467 };
468
469 ehci1: usb-host@51000 {
470 compatible = "marvell,orion-ehci";
471 reg = <0x51000 0x1000>;
472 interrupts = <25>;
473 clocks = <&gate_clk 1>;
474 status = "okay";
475 };
476
477 sdio0: sdio-host@92000 {
478 compatible = "marvell,dove-sdhci";
479 reg = <0x92000 0x100>;
480 interrupts = <35>, <37>;
481 clocks = <&gate_clk 8>;
482 pinctrl-0 = <&pmx_sdio0>;
483 pinctrl-names = "default";
484 status = "disabled";
485 }; 577 };
486 578
487 sdio1: sdio-host@90000 { 579 gpio0: gpio-ctrl@d0400 {
488 compatible = "marvell,dove-sdhci"; 580 compatible = "marvell,orion-gpio";
489 reg = <0x90000 0x100>; 581 #gpio-cells = <2>;
490 interrupts = <36>, <38>; 582 gpio-controller;
491 clocks = <&gate_clk 9>; 583 reg = <0xd0400 0x20>;
492 pinctrl-0 = <&pmx_sdio1>; 584 ngpios = <32>;
493 pinctrl-names = "default"; 585 interrupt-controller;
494 status = "disabled"; 586 #interrupt-cells = <2>;
587 interrupts = <12>, <13>, <14>, <60>;
495 }; 588 };
496 589
497 sata0: sata-host@a0000 { 590 gpio1: gpio-ctrl@d0420 {
498 compatible = "marvell,orion-sata"; 591 compatible = "marvell,orion-gpio";
499 reg = <0xa0000 0x2400>; 592 #gpio-cells = <2>;
500 interrupts = <62>; 593 gpio-controller;
501 clocks = <&gate_clk 3>; 594 reg = <0xd0420 0x20>;
502 nr-ports = <1>; 595 ngpios = <32>;
503 status = "disabled"; 596 interrupt-controller;
597 #interrupt-cells = <2>;
598 interrupts = <61>;
504 }; 599 };
505 600
506 rtc: real-time-clock@d8500 { 601 rtc: real-time-clock@d8500 {
@@ -510,107 +605,12 @@
510 interrupts = <5>; 605 interrupts = <5>;
511 }; 606 };
512 607
513 crypto: crypto-engine@30000 { 608 gpio2: gpio-ctrl@e8400 {
514 compatible = "marvell,orion-crypto"; 609 compatible = "marvell,orion-gpio";
515 reg = <0x30000 0x10000>, 610 #gpio-cells = <2>;
516 <0xffffe000 0x800>; 611 gpio-controller;
517 reg-names = "regs", "sram"; 612 reg = <0xe8400 0x0c>;
518 interrupts = <31>; 613 ngpios = <8>;
519 clocks = <&gate_clk 15>;
520 status = "okay";
521 };
522
523 xor0: dma-engine@60800 {
524 compatible = "marvell,orion-xor";
525 reg = <0x60800 0x100
526 0x60a00 0x100>;
527 clocks = <&gate_clk 23>;
528 status = "okay";
529
530 channel0 {
531 interrupts = <39>;
532 dmacap,memcpy;
533 dmacap,xor;
534 };
535
536 channel1 {
537 interrupts = <40>;
538 dmacap,memcpy;
539 dmacap,xor;
540 };
541 };
542
543 xor1: dma-engine@60900 {
544 compatible = "marvell,orion-xor";
545 reg = <0x60900 0x100
546 0x60b00 0x100>;
547 clocks = <&gate_clk 24>;
548 status = "okay";
549
550 channel0 {
551 interrupts = <42>;
552 dmacap,memcpy;
553 dmacap,xor;
554 };
555
556 channel1 {
557 interrupts = <43>;
558 dmacap,memcpy;
559 dmacap,xor;
560 };
561 };
562
563 mdio: mdio-bus@72004 {
564 compatible = "marvell,orion-mdio";
565 #address-cells = <1>;
566 #size-cells = <0>;
567 reg = <0x72004 0x84>;
568 interrupts = <30>;
569 clocks = <&gate_clk 2>;
570 status = "disabled";
571
572 ethphy: ethernet-phy {
573 device_type = "ethernet-phy";
574 /* set phy address in board file */
575 };
576 };
577
578 eth: ethernet-ctrl@72000 {
579 compatible = "marvell,orion-eth";
580 #address-cells = <1>;
581 #size-cells = <0>;
582 reg = <0x72000 0x4000>;
583 clocks = <&gate_clk 2>;
584 marvell,tx-checksum-limit = <1600>;
585 status = "disabled";
586
587 ethernet-port@0 {
588 device_type = "network";
589 compatible = "marvell,orion-eth-port";
590 reg = <0>;
591 interrupts = <29>;
592 /* overwrite MAC address in bootloader */
593 local-mac-address = [00 00 00 00 00 00];
594 phy-handle = <&ethphy>;
595 };
596 };
597
598 audio0: audio-controller@b0000 {
599 compatible = "marvell,dove-audio";
600 reg = <0xb0000 0x2210>;
601 interrupts = <19>, <20>;
602 clocks = <&gate_clk 12>;
603 clock-names = "internal";
604 status = "disabled";
605 };
606
607 audio1: audio-controller@b4000 {
608 compatible = "marvell,dove-audio";
609 reg = <0xb4000 0x2210>;
610 interrupts = <21>, <22>;
611 clocks = <&gate_clk 13>;
612 clock-names = "internal";
613 status = "disabled";
614 }; 614 };
615 }; 615 };
616 }; 616 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-06 17:14:16 -0500