aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/dove.dtsi
diff options
context:
space:
mode:
authorSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2012-08-15 13:07:34 -0400
committerJason Cooper <jason@lakedaemon.net>2012-09-21 13:07:24 -0400
commit80a8b54b9a0ba418f25d2014b1375f9f4876eb15 (patch)
treeb146eafb037fbd407149e12ae60aa21eafd39e3b /arch/arm/boot/dts/dove.dtsi
parent81d2ef7c40eceb7189872ecea5964f2041118d4a (diff)
ARM: dove: add device tree descriptors
This patch adds device tree decriptors for dove SoC and currently supported boards. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/dove.dtsi')
-rw-r--r--arch/arm/boot/dts/dove.dtsi143
1 files changed, 143 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
new file mode 100644
index 000000000000..96fb824b5e6e
--- /dev/null
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -0,0 +1,143 @@
1/include/ "skeleton.dtsi"
2
3/ {
4 compatible = "marvell,dove";
5 model = "Marvell Armada 88AP510 SoC";
6
7 interrupt-parent = <&intc>;
8
9 intc: interrupt-controller {
10 compatible = "marvell,orion-intc";
11 interrupt-controller;
12 #interrupt-cells = <1>;
13 reg = <0xf1020204 0x04>,
14 <0xf1020214 0x04>;
15 };
16
17 mbus@f1000000 {
18 compatible = "simple-bus";
19 ranges = <0 0xf1000000 0x4000000>;
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 uart0: serial@12000 {
24 compatible = "ns16550a";
25 reg = <0x12000 0x100>;
26 reg-shift = <2>;
27 interrupts = <7>;
28 clock-frequency = <166666667>;
29 status = "disabled";
30 };
31
32 uart1: serial@12100 {
33 compatible = "ns16550a";
34 reg = <0x12100 0x100>;
35 reg-shift = <2>;
36 interrupts = <8>;
37 clock-frequency = <166666667>;
38 status = "disabled";
39 };
40
41 uart2: serial@12200 {
42 compatible = "ns16550a";
43 reg = <0x12000 0x100>;
44 reg-shift = <2>;
45 interrupts = <9>;
46 clock-frequency = <166666667>;
47 status = "disabled";
48 };
49
50 uart3: serial@12300 {
51 compatible = "ns16550a";
52 reg = <0x12100 0x100>;
53 reg-shift = <2>;
54 interrupts = <10>;
55 clock-frequency = <166666667>;
56 status = "disabled";
57 };
58
59 wdt: wdt@20300 {
60 compatible = "marvell,orion-wdt";
61 reg = <0x20300 0x28>;
62 };
63
64 gpio0: gpio@d0400 {
65 compatible = "marvell,orion-gpio";
66 #gpio-cells = <2>;
67 gpio-controller;
68 reg = <0xd0400 0x20>;
69 ngpio = <32>;
70 interrupts = <12>, <13>, <14>, <60>;
71 };
72
73 gpio1: gpio@d0420 {
74 compatible = "marvell,orion-gpio";
75 #gpio-cells = <2>;
76 gpio-controller;
77 reg = <0xd0420 0x20>;
78 ngpio = <32>;
79 interrupts = <61>;
80 };
81
82 gpio2: gpio@e8400 {
83 compatible = "marvell,orion-gpio";
84 #gpio-cells = <2>;
85 gpio-controller;
86 reg = <0xe8400 0x0c>;
87 ngpio = <8>;
88 };
89
90 spi0: spi@10600 {
91 compatible = "marvell,orion-spi";
92 #address-cells = <1>;
93 #size-cells = <0>;
94 cell-index = <0>;
95 interrupts = <6>;
96 reg = <0x10600 0x28>;
97 status = "disabled";
98 };
99
100 spi1: spi@14600 {
101 compatible = "marvell,orion-spi";
102 #address-cells = <1>;
103 #size-cells = <0>;
104 cell-index = <1>;
105 interrupts = <5>;
106 reg = <0x14600 0x28>;
107 status = "disabled";
108 };
109
110 i2c0: i2c@11000 {
111 compatible = "marvell,mv64xxx-i2c";
112 reg = <0x11000 0x20>;
113 #address-cells = <1>;
114 #size-cells = <0>;
115 interrupts = <11>;
116 clock-frequency = <400000>;
117 timeout-ms = <1000>;
118 status = "disabled";
119 };
120
121 sdio0: sdio@92000 {
122 compatible = "marvell,dove-sdhci";
123 reg = <0x92000 0x100>;
124 interrupts = <35>, <37>;
125 status = "disabled";
126 };
127
128 sdio1: sdio@90000 {
129 compatible = "marvell,dove-sdhci";
130 reg = <0x90000 0x100>;
131 interrupts = <36>, <38>;
132 status = "disabled";
133 };
134
135 sata0: sata@a0000 {
136 compatible = "marvell,orion-sata";
137 reg = <0xa0000 0x2400>;
138 interrupts = <62>;
139 nr-ports = <1>;
140 status = "disabled";
141 };
142 };
143};