aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/dove.dtsi
diff options
context:
space:
mode:
authorSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2013-07-29 08:29:03 -0400
committerJason Cooper <jason@lakedaemon.net>2013-08-12 17:03:46 -0400
commit2d29983413a556ee74c013f80a17c69459303394 (patch)
treee4076dac5f2c3aad186b21108ca1dad5ff7e3341 /arch/arm/boot/dts/dove.dtsi
parentf4ada24bd606516ee04a892164deb8c80d2b9be9 (diff)
ARM: dove: add cpu device tree node
This adds a node for the Marvell Sheeva PJ4A CPU found on Dove SoCs. While at it, also move the l2-cache node out of internal registers and consistently name different nodes. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Conflicts: arch/arm/boot/dts/dove.dtsi
Diffstat (limited to 'arch/arm/boot/dts/dove.dtsi')
-rw-r--r--arch/arm/boot/dts/dove.dtsi233
1 files changed, 214 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index 8d5be1e856f2..cc279166646f 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -10,6 +10,23 @@
10 gpio2 = &gpio2; 10 gpio2 = &gpio2;
11 }; 11 };
12 12
13 cpus {
14 #address-cells = <1>;
15 #size-cells = <0>;
16
17 cpu0: cpu@0 {
18 compatible = "marvell,pj4a", "marvell,sheeva-v7";
19 device_type = "cpu";
20 next-level-cache = <&l2>;
21 reg = <0>;
22 };
23 };
24
25 l2: l2-cache {
26 compatible = "marvell,tauros2-cache";
27 marvell,tauros2-cache-features = <0>;
28 };
29
13 soc@f1000000 { 30 soc@f1000000 {
14 compatible = "simple-bus"; 31 compatible = "simple-bus";
15 #address-cells = <1>; 32 #address-cells = <1>;
@@ -25,11 +42,6 @@
25 0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */ 42 0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */
26 0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */ 43 0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */
27 44
28 l2: l2-cache {
29 compatible = "marvell,tauros2-cache";
30 marvell,tauros2-cache-features = <0>;
31 };
32
33 timer: timer@20300 { 45 timer: timer@20300 {
34 compatible = "marvell,orion-timer"; 46 compatible = "marvell,orion-timer";
35 reg = <0x20300 0x20>; 47 reg = <0x20300 0x20>;
@@ -60,14 +72,14 @@
60 #clock-cells = <1>; 72 #clock-cells = <1>;
61 }; 73 };
62 74
63 gate_clk: clock-gating-control@d0038 { 75 gate_clk: clock-gating-ctrl@d0038 {
64 compatible = "marvell,dove-gating-clock"; 76 compatible = "marvell,dove-gating-clock";
65 reg = <0xd0038 0x4>; 77 reg = <0xd0038 0x4>;
66 clocks = <&core_clk 0>; 78 clocks = <&core_clk 0>;
67 #clock-cells = <1>; 79 #clock-cells = <1>;
68 }; 80 };
69 81
70 thermal: thermal@d001c { 82 thermal: thermal-diode@d001c {
71 compatible = "marvell,dove-thermal"; 83 compatible = "marvell,dove-thermal";
72 reg = <0xd001c 0x0c>, <0xd005c 0x08>; 84 reg = <0xd001c 0x0c>, <0xd005c 0x08>;
73 }; 85 };
@@ -87,6 +99,8 @@
87 reg-shift = <2>; 99 reg-shift = <2>;
88 interrupts = <8>; 100 interrupts = <8>;
89 clocks = <&core_clk 0>; 101 clocks = <&core_clk 0>;
102 pinctrl-0 = <&pmx_uart1>;
103 pinctrl-names = "default";
90 status = "disabled"; 104 status = "disabled";
91 }; 105 };
92 106
@@ -108,7 +122,7 @@
108 status = "disabled"; 122 status = "disabled";
109 }; 123 };
110 124
111 gpio0: gpio@d0400 { 125 gpio0: gpio-ctrl@d0400 {
112 compatible = "marvell,orion-gpio"; 126 compatible = "marvell,orion-gpio";
113 #gpio-cells = <2>; 127 #gpio-cells = <2>;
114 gpio-controller; 128 gpio-controller;
@@ -119,7 +133,7 @@
119 interrupts = <12>, <13>, <14>, <60>; 133 interrupts = <12>, <13>, <14>, <60>;
120 }; 134 };
121 135
122 gpio1: gpio@d0420 { 136 gpio1: gpio-ctrl@d0420 {
123 compatible = "marvell,orion-gpio"; 137 compatible = "marvell,orion-gpio";
124 #gpio-cells = <2>; 138 #gpio-cells = <2>;
125 gpio-controller; 139 gpio-controller;
@@ -130,7 +144,7 @@
130 interrupts = <61>; 144 interrupts = <61>;
131 }; 145 };
132 146
133 gpio2: gpio@e8400 { 147 gpio2: gpio-ctrl@e8400 {
134 compatible = "marvell,orion-gpio"; 148 compatible = "marvell,orion-gpio";
135 #gpio-cells = <2>; 149 #gpio-cells = <2>;
136 gpio-controller; 150 gpio-controller;
@@ -138,13 +152,188 @@
138 ngpios = <8>; 152 ngpios = <8>;
139 }; 153 };
140 154
141 pinctrl: pinctrl@d0200 { 155 pinctrl: pin-ctrl@d0200 {
142 compatible = "marvell,dove-pinctrl"; 156 compatible = "marvell,dove-pinctrl";
143 reg = <0xd0200 0x10>; 157 reg = <0xd0200 0x10>;
144 clocks = <&gate_clk 22>; 158 clocks = <&gate_clk 22>;
159
160 pmx_gpio_0: pmx-gpio-0 {
161 marvell,pins = "mpp0";
162 marvell,function = "gpio";
163 };
164
165 pmx_gpio_1: pmx-gpio-1 {
166 marvell,pins = "mpp1";
167 marvell,function = "gpio";
168 };
169
170 pmx_gpio_2: pmx-gpio-2 {
171 marvell,pins = "mpp2";
172 marvell,function = "gpio";
173 };
174
175 pmx_gpio_3: pmx-gpio-3 {
176 marvell,pins = "mpp3";
177 marvell,function = "gpio";
178 };
179
180 pmx_gpio_4: pmx-gpio-4 {
181 marvell,pins = "mpp4";
182 marvell,function = "gpio";
183 };
184
185 pmx_gpio_5: pmx-gpio-5 {
186 marvell,pins = "mpp5";
187 marvell,function = "gpio";
188 };
189
190 pmx_gpio_6: pmx-gpio-6 {
191 marvell,pins = "mpp6";
192 marvell,function = "gpio";
193 };
194
195 pmx_gpio_7: pmx-gpio-7 {
196 marvell,pins = "mpp7";
197 marvell,function = "gpio";
198 };
199
200 pmx_gpio_8: pmx-gpio-8 {
201 marvell,pins = "mpp8";
202 marvell,function = "gpio";
203 };
204
205 pmx_gpio_9: pmx-gpio-9 {
206 marvell,pins = "mpp9";
207 marvell,function = "gpio";
208 };
209
210 pmx_gpio_10: pmx-gpio-10 {
211 marvell,pins = "mpp10";
212 marvell,function = "gpio";
213 };
214
215 pmx_gpio_11: pmx-gpio-11 {
216 marvell,pins = "mpp11";
217 marvell,function = "gpio";
218 };
219
220 pmx_gpio_12: pmx-gpio-12 {
221 marvell,pins = "mpp12";
222 marvell,function = "gpio";
223 };
224
225 pmx_gpio_13: pmx-gpio-13 {
226 marvell,pins = "mpp13";
227 marvell,function = "gpio";
228 };
229
230 pmx_gpio_14: pmx-gpio-14 {
231 marvell,pins = "mpp14";
232 marvell,function = "gpio";
233 };
234
235 pmx_gpio_15: pmx-gpio-15 {
236 marvell,pins = "mpp15";
237 marvell,function = "gpio";
238 };
239
240 pmx_gpio_16: pmx-gpio-16 {
241 marvell,pins = "mpp16";
242 marvell,function = "gpio";
243 };
244
245 pmx_gpio_17: pmx-gpio-17 {
246 marvell,pins = "mpp17";
247 marvell,function = "gpio";
248 };
249
250 pmx_gpio_18: pmx-gpio-18 {
251 marvell,pins = "mpp18";
252 marvell,function = "gpio";
253 };
254
255 pmx_gpio_19: pmx-gpio-19 {
256 marvell,pins = "mpp19";
257 marvell,function = "gpio";
258 };
259
260 pmx_gpio_20: pmx-gpio-20 {
261 marvell,pins = "mpp20";
262 marvell,function = "gpio";
263 };
264
265 pmx_gpio_21: pmx-gpio-21 {
266 marvell,pins = "mpp21";
267 marvell,function = "gpio";
268 };
269
270 pmx_camera: pmx-camera {
271 marvell,pins = "mpp_camera";
272 marvell,function = "camera";
273 };
274
275 pmx_camera_gpio: pmx-camera-gpio {
276 marvell,pins = "mpp_camera";
277 marvell,function = "gpio";
278 };
279
280 pmx_sdio0: pmx-sdio0 {
281 marvell,pins = "mpp_sdio0";
282 marvell,function = "sdio0";
283 };
284
285 pmx_sdio0_gpio: pmx-sdio0-gpio {
286 marvell,pins = "mpp_sdio0";
287 marvell,function = "gpio";
288 };
289
290 pmx_sdio1: pmx-sdio1 {
291 marvell,pins = "mpp_sdio1";
292 marvell,function = "sdio1";
293 };
294
295 pmx_sdio1_gpio: pmx-sdio1-gpio {
296 marvell,pins = "mpp_sdio1";
297 marvell,function = "gpio";
298 };
299
300 pmx_audio1_gpio: pmx-audio1-gpio {
301 marvell,pins = "mpp_audio1";
302 marvell,function = "gpio";
303 };
304
305 pmx_spi0: pmx-spi0 {
306 marvell,pins = "mpp_spi0";
307 marvell,function = "spi0";
308 };
309
310 pmx_spi0_gpio: pmx-spi0-gpio {
311 marvell,pins = "mpp_spi0";
312 marvell,function = "gpio";
313 };
314
315 pmx_uart1: pmx-uart1 {
316 marvell,pins = "mpp_uart1";
317 marvell,function = "uart1";
318 };
319
320 pmx_uart1_gpio: pmx-uart1-gpio {
321 marvell,pins = "mpp_uart1";
322 marvell,function = "gpio";
323 };
324
325 pmx_nand: pmx-nand {
326 marvell,pins = "mpp_nand";
327 marvell,function = "nand";
328 };
329
330 pmx_nand_gpo: pmx-nand-gpo {
331 marvell,pins = "mpp_nand";
332 marvell,function = "gpo";
333 };
145 }; 334 };
146 335
147 spi0: spi@10600 { 336 spi0: spi-ctrl@10600 {
148 compatible = "marvell,orion-spi"; 337 compatible = "marvell,orion-spi";
149 #address-cells = <1>; 338 #address-cells = <1>;
150 #size-cells = <0>; 339 #size-cells = <0>;
@@ -152,10 +341,12 @@
152 interrupts = <6>; 341 interrupts = <6>;
153 reg = <0x10600 0x28>; 342 reg = <0x10600 0x28>;
154 clocks = <&core_clk 0>; 343 clocks = <&core_clk 0>;
344 pinctrl-0 = <&pmx_spi0>;
345 pinctrl-names = "default";
155 status = "disabled"; 346 status = "disabled";
156 }; 347 };
157 348
158 spi1: spi@14600 { 349 spi1: spi-ctrl@14600 {
159 compatible = "marvell,orion-spi"; 350 compatible = "marvell,orion-spi";
160 #address-cells = <1>; 351 #address-cells = <1>;
161 #size-cells = <0>; 352 #size-cells = <0>;
@@ -166,7 +357,7 @@
166 status = "disabled"; 357 status = "disabled";
167 }; 358 };
168 359
169 i2c0: i2c@11000 { 360 i2c0: i2c-ctrl@11000 {
170 compatible = "marvell,mv64xxx-i2c"; 361 compatible = "marvell,mv64xxx-i2c";
171 reg = <0x11000 0x20>; 362 reg = <0x11000 0x20>;
172 #address-cells = <1>; 363 #address-cells = <1>;
@@ -194,23 +385,27 @@
194 status = "okay"; 385 status = "okay";
195 }; 386 };
196 387
197 sdio0: sdio@92000 { 388 sdio0: sdio-host@92000 {
198 compatible = "marvell,dove-sdhci"; 389 compatible = "marvell,dove-sdhci";
199 reg = <0x92000 0x100>; 390 reg = <0x92000 0x100>;
200 interrupts = <35>, <37>; 391 interrupts = <35>, <37>;
201 clocks = <&gate_clk 8>; 392 clocks = <&gate_clk 8>;
393 pinctrl-0 = <&pmx_sdio0>;
394 pinctrl-names = "default";
202 status = "disabled"; 395 status = "disabled";
203 }; 396 };
204 397
205 sdio1: sdio@90000 { 398 sdio1: sdio-host@90000 {
206 compatible = "marvell,dove-sdhci"; 399 compatible = "marvell,dove-sdhci";
207 reg = <0x90000 0x100>; 400 reg = <0x90000 0x100>;
208 interrupts = <36>, <38>; 401 interrupts = <36>, <38>;
209 clocks = <&gate_clk 9>; 402 clocks = <&gate_clk 9>;
403 pinctrl-0 = <&pmx_sdio1>;
404 pinctrl-names = "default";
210 status = "disabled"; 405 status = "disabled";
211 }; 406 };
212 407
213 sata0: sata@a0000 { 408 sata0: sata-host@a0000 {
214 compatible = "marvell,orion-sata"; 409 compatible = "marvell,orion-sata";
215 reg = <0xa0000 0x2400>; 410 reg = <0xa0000 0x2400>;
216 interrupts = <62>; 411 interrupts = <62>;
@@ -219,12 +414,12 @@
219 status = "disabled"; 414 status = "disabled";
220 }; 415 };
221 416
222 rtc@d8500 { 417 rtc: real-time-clock@d8500 {
223 compatible = "marvell,orion-rtc"; 418 compatible = "marvell,orion-rtc";
224 reg = <0xd8500 0x20>; 419 reg = <0xd8500 0x20>;
225 }; 420 };
226 421
227 crypto: crypto@30000 { 422 crypto: crypto-engine@30000 {
228 compatible = "marvell,orion-crypto"; 423 compatible = "marvell,orion-crypto";
229 reg = <0x30000 0x10000>, 424 reg = <0x30000 0x10000>,
230 <0xc8000000 0x800>; 425 <0xc8000000 0x800>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-08 20:34:24 -0500