ARM: dts: berlin: add the BG2Q GPIO nodes

The Marvell Berlin BG2Q has 6 GPIO ports compatible with the snps,dw-apb-gpio
driver. This patch adds the corresponding device tree nodes.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Reviewed-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

1 files changed, 102 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi
index 86d8a2c49f38..52c7d644e492 100644
--- a/arch/arm/boot/dts/berlin2q.dtsi
+++ b/arch/arm/boot/dts/berlin2q.dtsi
@@ -114,6 +114,78 @@
                         ranges = <0 0xe80000 0x10000>;
                         interrupt-parent = <&aic>;
 
+                        gpio0: gpio@0400 {
+                                compatible = "snps,dw-apb-gpio";
+                                reg = <0x0400 0x400>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                porta: gpio-port@0 {
+                                        compatible = "snps,dw-apb-gpio-port";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        snps,nr-gpios = <32>;
+                                        reg = <0>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                        interrupts = <0>;
+                                };
+                        };
+
+                        gpio1: gpio@0800 {
+                                compatible = "snps,dw-apb-gpio";
+                                reg = <0x0800 0x400>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                portb: gpio-port@1 {
+                                        compatible = "snps,dw-apb-gpio-port";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        snps,nr-gpios = <32>;
+                                        reg = <0>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                        interrupts = <1>;
+                                };
+                        };
+
+                        gpio2: gpio@0c00 {
+                                compatible = "snps,dw-apb-gpio";
+                                reg = <0x0c00 0x400>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                portc: gpio-port@2 {
+                                        compatible = "snps,dw-apb-gpio-port";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        snps,nr-gpios = <32>;
+                                        reg = <0>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                        interrupts = <2>;
+                                };
+                        };
+
+                        gpio3: gpio@1000 {
+                                compatible = "snps,dw-apb-gpio";
+                                reg = <0x1000 0x400>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                portd: gpio-port@3 {
+                                        compatible = "snps,dw-apb-gpio-port";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        snps,nr-gpios = <32>;
+                                        reg = <0>;
+                                        interrupt-controller;
+                                        #interrupt-cells = <2>;
+                                        interrupts = <3>;
+                                };
+                        };
+
                         timer0: timer@2c00 {
                                 compatible = "snps,dw-apb-timer";
                                 reg = <0x2c00 0x14>;
@@ -186,6 +258,36 @@
                                 interrupt-parent = <&gic>;
                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                         };
+
+                        gpio4: gpio@5000 {
+                                compatible = "snps,dw-apb-gpio";
+                                reg = <0x5000 0x400>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                porte: gpio-port@4 {
+                                        compatible = "snps,dw-apb-gpio-port";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        snps,nr-gpios = <32>;
+                                        reg = <0>;
+                                };
+                        };
+
+                        gpio5: gpio@c000 {
+                                compatible = "snps,dw-apb-gpio";
+                                reg = <0xc000 0x400>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                portf: gpio-port@5 {
+                                        compatible = "snps,dw-apb-gpio-port";
+                                        gpio-controller;
+                                        #gpio-cells = <2>;
+                                        snps,nr-gpios = <32>;
+                                        reg = <0>;
+                                };
+                        };
                 };
 
                 generic-regs@ea0110 {