diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2012-11-18 17:40:01 -0500 |
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committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2012-11-18 17:54:31 -0500 |
commit | 9e3129e937e2f178d2a003ea45765e5e63e34665 (patch) | |
tree | fab157ec8ba266d60c51823a78848528753bac6b /arch/arm/boot/dts/at91sam9x5.dtsi | |
parent | d9b4fe837d671af5329f32570362c3c0b571c40b (diff) |
ARM: at91: fix usart/uart namimg in pinctrl
USART are the full pin uart
DBGU the debug Unit
UART the two pin uart
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9x5.dtsi')
-rw-r--r-- | arch/arm/boot/dts/at91sam9x5.dtsi | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 9fd715926836..9dac00693faf 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi | |||
@@ -126,36 +126,36 @@ | |||
126 | }; | 126 | }; |
127 | }; | 127 | }; |
128 | 128 | ||
129 | uart0 { | 129 | usart0 { |
130 | pinctrl_uart0: uart0-0 { | 130 | pinctrl_usart0: usart0-0 { |
131 | atmel,pins = | 131 | atmel,pins = |
132 | <0 0 0x1 0x1 /* PA0 periph A with pullup */ | 132 | <0 0 0x1 0x1 /* PA0 periph A with pullup */ |
133 | 0 1 0x1 0x0>; /* PA1 periph A */ | 133 | 0 1 0x1 0x0>; /* PA1 periph A */ |
134 | }; | 134 | }; |
135 | 135 | ||
136 | pinctrl_uart0_rts_cts: uart0_rts_cts-0 { | 136 | pinctrl_usart0_rts_cts: usart0_rts_cts-0 { |
137 | atmel,pins = | 137 | atmel,pins = |
138 | <0 2 0x1 0x0 /* PA2 periph A */ | 138 | <0 2 0x1 0x0 /* PA2 periph A */ |
139 | 0 3 0x1 0x0>; /* PA3 periph A */ | 139 | 0 3 0x1 0x0>; /* PA3 periph A */ |
140 | }; | 140 | }; |
141 | }; | 141 | }; |
142 | 142 | ||
143 | uart1 { | 143 | usart1 { |
144 | pinctrl_uart1: uart1-0 { | 144 | pinctrl_usart1: usart1-0 { |
145 | atmel,pins = | 145 | atmel,pins = |
146 | <0 5 0x1 0x1 /* PA5 periph A with pullup */ | 146 | <0 5 0x1 0x1 /* PA5 periph A with pullup */ |
147 | 0 6 0x1 0x0>; /* PA6 periph A */ | 147 | 0 6 0x1 0x0>; /* PA6 periph A */ |
148 | }; | 148 | }; |
149 | 149 | ||
150 | pinctrl_uart1_rts_cts: uart1_rts_cts-0 { | 150 | pinctrl_usart1_rts_cts: usart1_rts_cts-0 { |
151 | atmel,pins = | 151 | atmel,pins = |
152 | <3 27 0x3 0x0 /* PC27 periph C */ | 152 | <3 27 0x3 0x0 /* PC27 periph C */ |
153 | 3 28 0x3 0x0>; /* PC28 periph C */ | 153 | 3 28 0x3 0x0>; /* PC28 periph C */ |
154 | }; | 154 | }; |
155 | }; | 155 | }; |
156 | 156 | ||
157 | uart2 { | 157 | usart2 { |
158 | pinctrl_uart2: uart2-0 { | 158 | pinctrl_usart2: usart2-0 { |
159 | atmel,pins = | 159 | atmel,pins = |
160 | <0 7 0x1 0x1 /* PA7 periph A with pullup */ | 160 | <0 7 0x1 0x1 /* PA7 periph A with pullup */ |
161 | 0 8 0x1 0x0>; /* PA8 periph A */ | 161 | 0 8 0x1 0x0>; /* PA8 periph A */ |
@@ -168,30 +168,30 @@ | |||
168 | }; | 168 | }; |
169 | }; | 169 | }; |
170 | 170 | ||
171 | uart3 { | 171 | usart3 { |
172 | pinctrl_uart3: uart3-0 { | 172 | pinctrl_uart3: usart3-0 { |
173 | atmel,pins = | 173 | atmel,pins = |
174 | <3 23 0x2 0x1 /* PC22 periph B with pullup */ | 174 | <3 23 0x2 0x1 /* PC22 periph B with pullup */ |
175 | 3 23 0x2 0x0>; /* PC23 periph B */ | 175 | 3 23 0x2 0x0>; /* PC23 periph B */ |
176 | }; | 176 | }; |
177 | 177 | ||
178 | pinctrl_uart3_rts_cts: uart3_rts_cts-0 { | 178 | pinctrl_usart3_rts_cts: usart3_rts_cts-0 { |
179 | atmel,pins = | 179 | atmel,pins = |
180 | <3 24 0x2 0x0 /* PC24 periph B */ | 180 | <3 24 0x2 0x0 /* PC24 periph B */ |
181 | 3 25 0x2 0x0>; /* PC25 periph B */ | 181 | 3 25 0x2 0x0>; /* PC25 periph B */ |
182 | }; | 182 | }; |
183 | }; | 183 | }; |
184 | 184 | ||
185 | usart0 { | 185 | uart0 { |
186 | pinctrl_usart0: usart0-0 { | 186 | pinctrl_uart0: uart0-0 { |
187 | atmel,pins = | 187 | atmel,pins = |
188 | <3 8 0x3 0x0 /* PC8 periph C */ | 188 | <3 8 0x3 0x0 /* PC8 periph C */ |
189 | 3 9 0x3 0x1>; /* PC9 periph C with pullup */ | 189 | 3 9 0x3 0x1>; /* PC9 periph C with pullup */ |
190 | }; | 190 | }; |
191 | }; | 191 | }; |
192 | 192 | ||
193 | usart1 { | 193 | uart1 { |
194 | pinctrl_usart1: usart1-0 { | 194 | pinctrl_uart1: uart1-0 { |
195 | atmel,pins = | 195 | atmel,pins = |
196 | <3 16 0x3 0x0 /* PC16 periph C */ | 196 | <3 16 0x3 0x0 /* PC16 periph C */ |
197 | 3 17 0x3 0x1>; /* PC17 periph C with pullup */ | 197 | 3 17 0x3 0x1>; /* PC17 periph C with pullup */ |
@@ -293,7 +293,7 @@ | |||
293 | atmel,use-dma-rx; | 293 | atmel,use-dma-rx; |
294 | atmel,use-dma-tx; | 294 | atmel,use-dma-tx; |
295 | pinctrl-names = "default"; | 295 | pinctrl-names = "default"; |
296 | pinctrl-0 = <&pinctrl_uart0>; | 296 | pinctrl-0 = <&pinctrl_usart0>; |
297 | status = "disabled"; | 297 | status = "disabled"; |
298 | }; | 298 | }; |
299 | 299 | ||
@@ -304,7 +304,7 @@ | |||
304 | atmel,use-dma-rx; | 304 | atmel,use-dma-rx; |
305 | atmel,use-dma-tx; | 305 | atmel,use-dma-tx; |
306 | pinctrl-names = "default"; | 306 | pinctrl-names = "default"; |
307 | pinctrl-0 = <&pinctrl_uart1>; | 307 | pinctrl-0 = <&pinctrl_usart1>; |
308 | status = "disabled"; | 308 | status = "disabled"; |
309 | }; | 309 | }; |
310 | 310 | ||
@@ -315,7 +315,7 @@ | |||
315 | atmel,use-dma-rx; | 315 | atmel,use-dma-rx; |
316 | atmel,use-dma-tx; | 316 | atmel,use-dma-tx; |
317 | pinctrl-names = "default"; | 317 | pinctrl-names = "default"; |
318 | pinctrl-0 = <&pinctrl_uart2>; | 318 | pinctrl-0 = <&pinctrl_usart2>; |
319 | status = "disabled"; | 319 | status = "disabled"; |
320 | }; | 320 | }; |
321 | 321 | ||