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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-11-15 19:24:17 -0500
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-11-19 12:10:27 -0500
commitd4fe9ac76d43a2ce5472e0ed19c8e1e29dea0688 (patch)
tree0c97de205118af66f66c1d708b775714e4689947 /arch/arm/boot/dts/at91sam9x5.dtsi
parent4134a4552748dd31b6e410a79e6c09be6e876b73 (diff)
ARM: at91: dt: at91sam9: add mmc pinctrl support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9x5.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 7f56b07438a1..7ee49e8daf98 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -250,6 +250,38 @@
250 }; 250 };
251 }; 251 };
252 252
253 mmc0 {
254 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
255 atmel,pins =
256 <0 17 0x1 0x0 /* PA17 periph A */
257 0 16 0x1 0x1 /* PA16 periph A with pullup */
258 0 15 0x1 0x1>; /* PA15 periph A with pullup */
259 };
260
261 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
262 atmel,pins =
263 <0 18 0x1 0x1 /* PA18 periph A with pullup */
264 0 19 0x1 0x1 /* PA19 periph A with pullup */
265 0 20 0x1 0x1>; /* PA20 periph A with pullup */
266 };
267 };
268
269 mmc1 {
270 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
271 atmel,pins =
272 <0 13 0x2 0x0 /* PA13 periph B */
273 0 12 0x2 0x1 /* PA12 periph B with pullup */
274 0 11 0x2 0x1>; /* PA11 periph B with pullup */
275 };
276
277 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
278 atmel,pins =
279 <0 2 0x2 0x1 /* PA2 periph B with pullup */
280 0 3 0x2 0x1 /* PA3 periph B with pullup */
281 0 4 0x2 0x1>; /* PA4 periph B with pullup */
282 };
283 };
284
253 pioA: gpio@fffff400 { 285 pioA: gpio@fffff400 {
254 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 286 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
255 reg = <0xfffff400 0x200>; 287 reg = <0xfffff400 0x200>;