diff options
author | Olof Johansson <olof@lixom.net> | 2013-06-01 03:38:04 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2013-06-01 03:38:04 -0400 |
commit | fc20c6ffdd9875c42c9ff0d4233ed8960165633b (patch) | |
tree | a36b423c815efc859b833338a27b45011d4ad8c0 /arch/arm/boot/dts/at91sam9n12.dtsi | |
parent | 3c09f4daeee83b76779dec766f57e9e883402bb1 (diff) | |
parent | 028633c238f91dc113520a7ad25d37b2ba9068af (diff) |
Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dt
From Nicolas Ferre:
Big DT-centric update for AT91:
- Calao boards update, removal of one board C file and
associated defconfig, Kconfig Makefile lines
- several Acme boards updates
- addition of watchdog, uart and pinctrl descriptions for
several products
- modification of RTC compatible string for 9x5 family
* tag 'at91-dt' of git://github.com/at91linux/linux-at91: (21 commits)
ARM: at91/dt: add pinctrl definition for at91 tc blocks
ARM: at91/dts: add the watchdog nodes for at91 boards
ARM: at91/dtsi: add the watchdog nodes for at91 SoC
ARM: at91: drop non DT: Calao USB-A96x
ARM: at91: dt: add Calao USB-A9G20 low power version
ARM: at91: dt: usb-a9263: add dataflash support
ARM: at91: dt: usb-a9263: update shutdown controller
ARM: at91: dt: usb-a9260: update shutdown controller
ARM: at91: dt: sam9260: add i2c gpio pinctrl
ARM: at91: switch Fox G20 board .dts to pre-processor defines
ARM: at91: add Acme Systems Fox G20 board
ARM: at91/at91-ariag25.dts: UART0/1 nodes are disabled
ARM: at91/at91sam9x5.dtsi: add UART0/1 nodes
ARM: at91/at91-ariag25.dts: add RTC node
ARM: at91: at91sam9x5 RTC is not compatible with at91rm9200 one
ARM: at91: udpate defconfigs
ARM: at91: dt: switch to standard IRQ flag defines
ARM: at91: dt: switch to pinctrl to pre-processor
ARM: at91: dt: add pinctrl pre-processor define
ARM: at91: dt: switch to standard GPIO flag defines.
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9n12.dtsi')
-rw-r--r-- | arch/arm/boot/dts/at91sam9n12.dtsi | 223 |
1 files changed, 154 insertions, 69 deletions
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi index 8d25f889928e..1d220b26f516 100644 --- a/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/at91sam9n12.dtsi | |||
@@ -7,7 +7,10 @@ | |||
7 | * Licensed under GPLv2 or later. | 7 | * Licensed under GPLv2 or later. |
8 | */ | 8 | */ |
9 | 9 | ||
10 | /include/ "skeleton.dtsi" | 10 | #include "skeleton.dtsi" |
11 | #include <dt-bindings/pinctrl/at91.h> | ||
12 | #include <dt-bindings/interrupt-controller/irq.h> | ||
13 | #include <dt-bindings/gpio/gpio.h> | ||
11 | 14 | ||
12 | / { | 15 | / { |
13 | model = "Atmel AT91SAM9N12 SoC"; | 16 | model = "Atmel AT91SAM9N12 SoC"; |
@@ -78,7 +81,7 @@ | |||
78 | pit: timer@fffffe30 { | 81 | pit: timer@fffffe30 { |
79 | compatible = "atmel,at91sam9260-pit"; | 82 | compatible = "atmel,at91sam9260-pit"; |
80 | reg = <0xfffffe30 0xf>; | 83 | reg = <0xfffffe30 0xf>; |
81 | interrupts = <1 4 7>; | 84 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
82 | }; | 85 | }; |
83 | 86 | ||
84 | shdwc@fffffe10 { | 87 | shdwc@fffffe10 { |
@@ -89,7 +92,7 @@ | |||
89 | mmc0: mmc@f0008000 { | 92 | mmc0: mmc@f0008000 { |
90 | compatible = "atmel,hsmci"; | 93 | compatible = "atmel,hsmci"; |
91 | reg = <0xf0008000 0x600>; | 94 | reg = <0xf0008000 0x600>; |
92 | interrupts = <12 4 0>; | 95 | interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; |
93 | dmas = <&dma 1 0>; | 96 | dmas = <&dma 1 0>; |
94 | dma-names = "rxtx"; | 97 | dma-names = "rxtx"; |
95 | #address-cells = <1>; | 98 | #address-cells = <1>; |
@@ -100,19 +103,19 @@ | |||
100 | tcb0: timer@f8008000 { | 103 | tcb0: timer@f8008000 { |
101 | compatible = "atmel,at91sam9x5-tcb"; | 104 | compatible = "atmel,at91sam9x5-tcb"; |
102 | reg = <0xf8008000 0x100>; | 105 | reg = <0xf8008000 0x100>; |
103 | interrupts = <17 4 0>; | 106 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; |
104 | }; | 107 | }; |
105 | 108 | ||
106 | tcb1: timer@f800c000 { | 109 | tcb1: timer@f800c000 { |
107 | compatible = "atmel,at91sam9x5-tcb"; | 110 | compatible = "atmel,at91sam9x5-tcb"; |
108 | reg = <0xf800c000 0x100>; | 111 | reg = <0xf800c000 0x100>; |
109 | interrupts = <17 4 0>; | 112 | interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; |
110 | }; | 113 | }; |
111 | 114 | ||
112 | dma: dma-controller@ffffec00 { | 115 | dma: dma-controller@ffffec00 { |
113 | compatible = "atmel,at91sam9g45-dma"; | 116 | compatible = "atmel,at91sam9g45-dma"; |
114 | reg = <0xffffec00 0x200>; | 117 | reg = <0xffffec00 0x200>; |
115 | interrupts = <20 4 0>; | 118 | interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; |
116 | #dma-cells = <2>; | 119 | #dma-cells = <2>; |
117 | }; | 120 | }; |
118 | 121 | ||
@@ -134,159 +137,235 @@ | |||
134 | dbgu { | 137 | dbgu { |
135 | pinctrl_dbgu: dbgu-0 { | 138 | pinctrl_dbgu: dbgu-0 { |
136 | atmel,pins = | 139 | atmel,pins = |
137 | <0 9 0x1 0x0 /* PA9 periph A */ | 140 | <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */ |
138 | 0 10 0x1 0x1>; /* PA10 periph with pullup */ | 141 | AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */ |
139 | }; | 142 | }; |
140 | }; | 143 | }; |
141 | 144 | ||
142 | usart0 { | 145 | usart0 { |
143 | pinctrl_usart0: usart0-0 { | 146 | pinctrl_usart0: usart0-0 { |
144 | atmel,pins = | 147 | atmel,pins = |
145 | <0 1 0x1 0x1 /* PA1 periph A with pullup */ | 148 | <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ |
146 | 0 0 0x1 0x0>; /* PA0 periph A */ | 149 | AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */ |
147 | }; | 150 | }; |
148 | 151 | ||
149 | pinctrl_usart0_rts: usart0_rts-0 { | 152 | pinctrl_usart0_rts: usart0_rts-0 { |
150 | atmel,pins = | 153 | atmel,pins = |
151 | <0 2 0x1 0x0>; /* PA2 periph A */ | 154 | <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */ |
152 | }; | 155 | }; |
153 | 156 | ||
154 | pinctrl_usart0_cts: usart0_cts-0 { | 157 | pinctrl_usart0_cts: usart0_cts-0 { |
155 | atmel,pins = | 158 | atmel,pins = |
156 | <0 3 0x1 0x0>; /* PA3 periph A */ | 159 | <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */ |
157 | }; | 160 | }; |
158 | }; | 161 | }; |
159 | 162 | ||
160 | usart1 { | 163 | usart1 { |
161 | pinctrl_usart1: usart1-0 { | 164 | pinctrl_usart1: usart1-0 { |
162 | atmel,pins = | 165 | atmel,pins = |
163 | <0 6 0x1 0x1 /* PA6 periph A with pullup */ | 166 | <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */ |
164 | 0 5 0x1 0x0>; /* PA5 periph A */ | 167 | AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */ |
165 | }; | 168 | }; |
166 | }; | 169 | }; |
167 | 170 | ||
168 | usart2 { | 171 | usart2 { |
169 | pinctrl_usart2: usart2-0 { | 172 | pinctrl_usart2: usart2-0 { |
170 | atmel,pins = | 173 | atmel,pins = |
171 | <0 8 0x1 0x1 /* PA8 periph A with pullup */ | 174 | <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */ |
172 | 0 7 0x1 0x0>; /* PA7 periph A */ | 175 | AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */ |
173 | }; | 176 | }; |
174 | 177 | ||
175 | pinctrl_usart2_rts: usart2_rts-0 { | 178 | pinctrl_usart2_rts: usart2_rts-0 { |
176 | atmel,pins = | 179 | atmel,pins = |
177 | <1 0 0x2 0x0>; /* PB0 periph B */ | 180 | <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ |
178 | }; | 181 | }; |
179 | 182 | ||
180 | pinctrl_usart2_cts: usart2_cts-0 { | 183 | pinctrl_usart2_cts: usart2_cts-0 { |
181 | atmel,pins = | 184 | atmel,pins = |
182 | <1 1 0x2 0x0>; /* PB1 periph B */ | 185 | <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ |
183 | }; | 186 | }; |
184 | }; | 187 | }; |
185 | 188 | ||
186 | usart3 { | 189 | usart3 { |
187 | pinctrl_usart3: usart3-0 { | 190 | pinctrl_usart3: usart3-0 { |
188 | atmel,pins = | 191 | atmel,pins = |
189 | <2 23 0x2 0x1 /* PC23 periph B with pullup */ | 192 | <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */ |
190 | 2 22 0x2 0x0>; /* PC22 periph B */ | 193 | AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */ |
191 | }; | 194 | }; |
192 | 195 | ||
193 | pinctrl_usart3_rts: usart3_rts-0 { | 196 | pinctrl_usart3_rts: usart3_rts-0 { |
194 | atmel,pins = | 197 | atmel,pins = |
195 | <2 24 0x2 0x0>; /* PC24 periph B */ | 198 | <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ |
196 | }; | 199 | }; |
197 | 200 | ||
198 | pinctrl_usart3_cts: usart3_cts-0 { | 201 | pinctrl_usart3_cts: usart3_cts-0 { |
199 | atmel,pins = | 202 | atmel,pins = |
200 | <2 25 0x2 0x0>; /* PC25 periph B */ | 203 | <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ |
201 | }; | 204 | }; |
202 | }; | 205 | }; |
203 | 206 | ||
204 | uart0 { | 207 | uart0 { |
205 | pinctrl_uart0: uart0-0 { | 208 | pinctrl_uart0: uart0-0 { |
206 | atmel,pins = | 209 | atmel,pins = |
207 | <2 9 0x3 0x1 /* PC9 periph C with pullup */ | 210 | <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */ |
208 | 2 8 0x3 0x0>; /* PC8 periph C */ | 211 | AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */ |
209 | }; | 212 | }; |
210 | }; | 213 | }; |
211 | 214 | ||
212 | uart1 { | 215 | uart1 { |
213 | pinctrl_uart1: uart1-0 { | 216 | pinctrl_uart1: uart1-0 { |
214 | atmel,pins = | 217 | atmel,pins = |
215 | <2 16 0x3 0x1 /* PC17 periph C with pullup */ | 218 | <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */ |
216 | 2 17 0x3 0x0>; /* PC16 periph C */ | 219 | AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */ |
217 | }; | 220 | }; |
218 | }; | 221 | }; |
219 | 222 | ||
220 | nand { | 223 | nand { |
221 | pinctrl_nand: nand-0 { | 224 | pinctrl_nand: nand-0 { |
222 | atmel,pins = | 225 | atmel,pins = |
223 | <3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/ | 226 | <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/ |
224 | 3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */ | 227 | AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */ |
225 | }; | 228 | }; |
226 | }; | 229 | }; |
227 | 230 | ||
228 | mmc0 { | 231 | mmc0 { |
229 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { | 232 | pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { |
230 | atmel,pins = | 233 | atmel,pins = |
231 | <0 17 0x1 0x0 /* PA17 periph A */ | 234 | <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ |
232 | 0 16 0x1 0x1 /* PA16 periph A with pullup */ | 235 | AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ |
233 | 0 15 0x1 0x1>; /* PA15 periph A with pullup */ | 236 | AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */ |
234 | }; | 237 | }; |
235 | 238 | ||
236 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { | 239 | pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { |
237 | atmel,pins = | 240 | atmel,pins = |
238 | <0 18 0x1 0x1 /* PA18 periph A with pullup */ | 241 | <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ |
239 | 0 19 0x1 0x1 /* PA19 periph A with pullup */ | 242 | AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ |
240 | 0 20 0x1 0x1>; /* PA20 periph A with pullup */ | 243 | AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ |
241 | }; | 244 | }; |
242 | 245 | ||
243 | pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { | 246 | pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { |
244 | atmel,pins = | 247 | atmel,pins = |
245 | <0 11 0x2 0x1 /* PA11 periph B with pullup */ | 248 | <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */ |
246 | 0 12 0x2 0x1 /* PA12 periph B with pullup */ | 249 | AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */ |
247 | 0 13 0x2 0x1 /* PA13 periph B with pullup */ | 250 | AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */ |
248 | 0 14 0x2 0x1>; /* PA14 periph B with pullup */ | 251 | AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */ |
249 | }; | 252 | }; |
250 | }; | 253 | }; |
251 | 254 | ||
252 | ssc0 { | 255 | ssc0 { |
253 | pinctrl_ssc0_tx: ssc0_tx-0 { | 256 | pinctrl_ssc0_tx: ssc0_tx-0 { |
254 | atmel,pins = | 257 | atmel,pins = |
255 | <0 24 0x2 0x0 /* PA24 periph B */ | 258 | <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ |
256 | 0 25 0x2 0x0 /* PA25 periph B */ | 259 | AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ |
257 | 0 26 0x2 0x0>; /* PA26 periph B */ | 260 | AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */ |
258 | }; | 261 | }; |
259 | 262 | ||
260 | pinctrl_ssc0_rx: ssc0_rx-0 { | 263 | pinctrl_ssc0_rx: ssc0_rx-0 { |
261 | atmel,pins = | 264 | atmel,pins = |
262 | <0 27 0x2 0x0 /* PA27 periph B */ | 265 | <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ |
263 | 0 28 0x2 0x0 /* PA28 periph B */ | 266 | AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ |
264 | 0 29 0x2 0x0>; /* PA29 periph B */ | 267 | AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ |
265 | }; | 268 | }; |
266 | }; | 269 | }; |
267 | 270 | ||
268 | spi0 { | 271 | spi0 { |
269 | pinctrl_spi0: spi0-0 { | 272 | pinctrl_spi0: spi0-0 { |
270 | atmel,pins = | 273 | atmel,pins = |
271 | <0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */ | 274 | <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */ |
272 | 0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */ | 275 | AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */ |
273 | 0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */ | 276 | AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */ |
274 | }; | 277 | }; |
275 | }; | 278 | }; |
276 | 279 | ||
277 | spi1 { | 280 | spi1 { |
278 | pinctrl_spi1: spi1-0 { | 281 | pinctrl_spi1: spi1-0 { |
279 | atmel,pins = | 282 | atmel,pins = |
280 | <0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */ | 283 | <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */ |
281 | 0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */ | 284 | AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */ |
282 | 0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */ | 285 | AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */ |
286 | }; | ||
287 | }; | ||
288 | |||
289 | tcb0 { | ||
290 | pinctrl_tcb0_tclk0: tcb0_tclk0-0 { | ||
291 | atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
292 | }; | ||
293 | |||
294 | pinctrl_tcb0_tclk1: tcb0_tclk1-0 { | ||
295 | atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
296 | }; | ||
297 | |||
298 | pinctrl_tcb0_tclk2: tcb0_tclk2-0 { | ||
299 | atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
300 | }; | ||
301 | |||
302 | pinctrl_tcb0_tioa0: tcb0_tioa0-0 { | ||
303 | atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
304 | }; | ||
305 | |||
306 | pinctrl_tcb0_tioa1: tcb0_tioa1-0 { | ||
307 | atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
308 | }; | ||
309 | |||
310 | pinctrl_tcb0_tioa2: tcb0_tioa2-0 { | ||
311 | atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
312 | }; | ||
313 | |||
314 | pinctrl_tcb0_tiob0: tcb0_tiob0-0 { | ||
315 | atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
316 | }; | ||
317 | |||
318 | pinctrl_tcb0_tiob1: tcb0_tiob1-0 { | ||
319 | atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
320 | }; | ||
321 | |||
322 | pinctrl_tcb0_tiob2: tcb0_tiob2-0 { | ||
323 | atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; | ||
324 | }; | ||
325 | }; | ||
326 | |||
327 | tcb1 { | ||
328 | pinctrl_tcb1_tclk0: tcb1_tclk0-0 { | ||
329 | atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; | ||
330 | }; | ||
331 | |||
332 | pinctrl_tcb1_tclk1: tcb1_tclk1-0 { | ||
333 | atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; | ||
334 | }; | ||
335 | |||
336 | pinctrl_tcb1_tclk2: tcb1_tclk2-0 { | ||
337 | atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>; | ||
338 | }; | ||
339 | |||
340 | pinctrl_tcb1_tioa0: tcb1_tioa0-0 { | ||
341 | atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>; | ||
342 | }; | ||
343 | |||
344 | pinctrl_tcb1_tioa1: tcb1_tioa1-0 { | ||
345 | atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; | ||
346 | }; | ||
347 | |||
348 | pinctrl_tcb1_tioa2: tcb1_tioa2-0 { | ||
349 | atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>; | ||
350 | }; | ||
351 | |||
352 | pinctrl_tcb1_tiob0: tcb1_tiob0-0 { | ||
353 | atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; | ||
354 | }; | ||
355 | |||
356 | pinctrl_tcb1_tiob1: tcb1_tiob1-0 { | ||
357 | atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; | ||
358 | }; | ||
359 | |||
360 | pinctrl_tcb1_tiob2: tcb1_tiob2-0 { | ||
361 | atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>; | ||
283 | }; | 362 | }; |
284 | }; | 363 | }; |
285 | 364 | ||
286 | pioA: gpio@fffff400 { | 365 | pioA: gpio@fffff400 { |
287 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 366 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
288 | reg = <0xfffff400 0x200>; | 367 | reg = <0xfffff400 0x200>; |
289 | interrupts = <2 4 1>; | 368 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
290 | #gpio-cells = <2>; | 369 | #gpio-cells = <2>; |
291 | gpio-controller; | 370 | gpio-controller; |
292 | interrupt-controller; | 371 | interrupt-controller; |
@@ -296,7 +375,7 @@ | |||
296 | pioB: gpio@fffff600 { | 375 | pioB: gpio@fffff600 { |
297 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 376 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
298 | reg = <0xfffff600 0x200>; | 377 | reg = <0xfffff600 0x200>; |
299 | interrupts = <2 4 1>; | 378 | interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; |
300 | #gpio-cells = <2>; | 379 | #gpio-cells = <2>; |
301 | gpio-controller; | 380 | gpio-controller; |
302 | interrupt-controller; | 381 | interrupt-controller; |
@@ -306,7 +385,7 @@ | |||
306 | pioC: gpio@fffff800 { | 385 | pioC: gpio@fffff800 { |
307 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 386 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
308 | reg = <0xfffff800 0x200>; | 387 | reg = <0xfffff800 0x200>; |
309 | interrupts = <3 4 1>; | 388 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
310 | #gpio-cells = <2>; | 389 | #gpio-cells = <2>; |
311 | gpio-controller; | 390 | gpio-controller; |
312 | interrupt-controller; | 391 | interrupt-controller; |
@@ -316,7 +395,7 @@ | |||
316 | pioD: gpio@fffffa00 { | 395 | pioD: gpio@fffffa00 { |
317 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; | 396 | compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; |
318 | reg = <0xfffffa00 0x200>; | 397 | reg = <0xfffffa00 0x200>; |
319 | interrupts = <3 4 1>; | 398 | interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; |
320 | #gpio-cells = <2>; | 399 | #gpio-cells = <2>; |
321 | gpio-controller; | 400 | gpio-controller; |
322 | interrupt-controller; | 401 | interrupt-controller; |
@@ -327,7 +406,7 @@ | |||
327 | dbgu: serial@fffff200 { | 406 | dbgu: serial@fffff200 { |
328 | compatible = "atmel,at91sam9260-usart"; | 407 | compatible = "atmel,at91sam9260-usart"; |
329 | reg = <0xfffff200 0x200>; | 408 | reg = <0xfffff200 0x200>; |
330 | interrupts = <1 4 7>; | 409 | interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; |
331 | pinctrl-names = "default"; | 410 | pinctrl-names = "default"; |
332 | pinctrl-0 = <&pinctrl_dbgu>; | 411 | pinctrl-0 = <&pinctrl_dbgu>; |
333 | status = "disabled"; | 412 | status = "disabled"; |
@@ -336,7 +415,7 @@ | |||
336 | ssc0: ssc@f0010000 { | 415 | ssc0: ssc@f0010000 { |
337 | compatible = "atmel,at91sam9g45-ssc"; | 416 | compatible = "atmel,at91sam9g45-ssc"; |
338 | reg = <0xf0010000 0x4000>; | 417 | reg = <0xf0010000 0x4000>; |
339 | interrupts = <28 4 5>; | 418 | interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>; |
340 | pinctrl-names = "default"; | 419 | pinctrl-names = "default"; |
341 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; | 420 | pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; |
342 | status = "disabled"; | 421 | status = "disabled"; |
@@ -345,7 +424,7 @@ | |||
345 | usart0: serial@f801c000 { | 424 | usart0: serial@f801c000 { |
346 | compatible = "atmel,at91sam9260-usart"; | 425 | compatible = "atmel,at91sam9260-usart"; |
347 | reg = <0xf801c000 0x4000>; | 426 | reg = <0xf801c000 0x4000>; |
348 | interrupts = <5 4 5>; | 427 | interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; |
349 | pinctrl-names = "default"; | 428 | pinctrl-names = "default"; |
350 | pinctrl-0 = <&pinctrl_usart0>; | 429 | pinctrl-0 = <&pinctrl_usart0>; |
351 | status = "disabled"; | 430 | status = "disabled"; |
@@ -354,7 +433,7 @@ | |||
354 | usart1: serial@f8020000 { | 433 | usart1: serial@f8020000 { |
355 | compatible = "atmel,at91sam9260-usart"; | 434 | compatible = "atmel,at91sam9260-usart"; |
356 | reg = <0xf8020000 0x4000>; | 435 | reg = <0xf8020000 0x4000>; |
357 | interrupts = <6 4 5>; | 436 | interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; |
358 | pinctrl-names = "default"; | 437 | pinctrl-names = "default"; |
359 | pinctrl-0 = <&pinctrl_usart1>; | 438 | pinctrl-0 = <&pinctrl_usart1>; |
360 | status = "disabled"; | 439 | status = "disabled"; |
@@ -363,7 +442,7 @@ | |||
363 | usart2: serial@f8024000 { | 442 | usart2: serial@f8024000 { |
364 | compatible = "atmel,at91sam9260-usart"; | 443 | compatible = "atmel,at91sam9260-usart"; |
365 | reg = <0xf8024000 0x4000>; | 444 | reg = <0xf8024000 0x4000>; |
366 | interrupts = <7 4 5>; | 445 | interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; |
367 | pinctrl-names = "default"; | 446 | pinctrl-names = "default"; |
368 | pinctrl-0 = <&pinctrl_usart2>; | 447 | pinctrl-0 = <&pinctrl_usart2>; |
369 | status = "disabled"; | 448 | status = "disabled"; |
@@ -372,7 +451,7 @@ | |||
372 | usart3: serial@f8028000 { | 451 | usart3: serial@f8028000 { |
373 | compatible = "atmel,at91sam9260-usart"; | 452 | compatible = "atmel,at91sam9260-usart"; |
374 | reg = <0xf8028000 0x4000>; | 453 | reg = <0xf8028000 0x4000>; |
375 | interrupts = <8 4 5>; | 454 | interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; |
376 | pinctrl-names = "default"; | 455 | pinctrl-names = "default"; |
377 | pinctrl-0 = <&pinctrl_usart3>; | 456 | pinctrl-0 = <&pinctrl_usart3>; |
378 | status = "disabled"; | 457 | status = "disabled"; |
@@ -381,7 +460,7 @@ | |||
381 | i2c0: i2c@f8010000 { | 460 | i2c0: i2c@f8010000 { |
382 | compatible = "atmel,at91sam9x5-i2c"; | 461 | compatible = "atmel,at91sam9x5-i2c"; |
383 | reg = <0xf8010000 0x100>; | 462 | reg = <0xf8010000 0x100>; |
384 | interrupts = <9 4 6>; | 463 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>; |
385 | dmas = <&dma 1 13>, | 464 | dmas = <&dma 1 13>, |
386 | <&dma 1 14>; | 465 | <&dma 1 14>; |
387 | dma-names = "tx", "rx"; | 466 | dma-names = "tx", "rx"; |
@@ -393,7 +472,7 @@ | |||
393 | i2c1: i2c@f8014000 { | 472 | i2c1: i2c@f8014000 { |
394 | compatible = "atmel,at91sam9x5-i2c"; | 473 | compatible = "atmel,at91sam9x5-i2c"; |
395 | reg = <0xf8014000 0x100>; | 474 | reg = <0xf8014000 0x100>; |
396 | interrupts = <10 4 6>; | 475 | interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>; |
397 | dmas = <&dma 1 15>, | 476 | dmas = <&dma 1 15>, |
398 | <&dma 1 16>; | 477 | <&dma 1 16>; |
399 | dma-names = "tx", "rx"; | 478 | dma-names = "tx", "rx"; |
@@ -407,7 +486,7 @@ | |||
407 | #size-cells = <0>; | 486 | #size-cells = <0>; |
408 | compatible = "atmel,at91rm9200-spi"; | 487 | compatible = "atmel,at91rm9200-spi"; |
409 | reg = <0xf0000000 0x100>; | 488 | reg = <0xf0000000 0x100>; |
410 | interrupts = <13 4 3>; | 489 | interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; |
411 | pinctrl-names = "default"; | 490 | pinctrl-names = "default"; |
412 | pinctrl-0 = <&pinctrl_spi0>; | 491 | pinctrl-0 = <&pinctrl_spi0>; |
413 | status = "disabled"; | 492 | status = "disabled"; |
@@ -418,11 +497,17 @@ | |||
418 | #size-cells = <0>; | 497 | #size-cells = <0>; |
419 | compatible = "atmel,at91rm9200-spi"; | 498 | compatible = "atmel,at91rm9200-spi"; |
420 | reg = <0xf0004000 0x100>; | 499 | reg = <0xf0004000 0x100>; |
421 | interrupts = <14 4 3>; | 500 | interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; |
422 | pinctrl-names = "default"; | 501 | pinctrl-names = "default"; |
423 | pinctrl-0 = <&pinctrl_spi1>; | 502 | pinctrl-0 = <&pinctrl_spi1>; |
424 | status = "disabled"; | 503 | status = "disabled"; |
425 | }; | 504 | }; |
505 | |||
506 | watchdog@fffffe40 { | ||
507 | compatible = "atmel,at91sam9260-wdt"; | ||
508 | reg = <0xfffffe40 0x10>; | ||
509 | status = "disabled"; | ||
510 | }; | ||
426 | }; | 511 | }; |
427 | 512 | ||
428 | nand0: nand@40000000 { | 513 | nand0: nand@40000000 { |
@@ -439,8 +524,8 @@ | |||
439 | atmel,nand-cmd-offset = <22>; | 524 | atmel,nand-cmd-offset = <22>; |
440 | pinctrl-names = "default"; | 525 | pinctrl-names = "default"; |
441 | pinctrl-0 = <&pinctrl_nand>; | 526 | pinctrl-0 = <&pinctrl_nand>; |
442 | gpios = <&pioD 5 0 | 527 | gpios = <&pioD 5 GPIO_ACTIVE_HIGH |
443 | &pioD 4 0 | 528 | &pioD 4 GPIO_ACTIVE_HIGH |
444 | 0 | 529 | 0 |
445 | >; | 530 | >; |
446 | status = "disabled"; | 531 | status = "disabled"; |
@@ -449,15 +534,15 @@ | |||
449 | usb0: ohci@00500000 { | 534 | usb0: ohci@00500000 { |
450 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; | 535 | compatible = "atmel,at91rm9200-ohci", "usb-ohci"; |
451 | reg = <0x00500000 0x00100000>; | 536 | reg = <0x00500000 0x00100000>; |
452 | interrupts = <22 4 2>; | 537 | interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; |
453 | status = "disabled"; | 538 | status = "disabled"; |
454 | }; | 539 | }; |
455 | }; | 540 | }; |
456 | 541 | ||
457 | i2c@0 { | 542 | i2c@0 { |
458 | compatible = "i2c-gpio"; | 543 | compatible = "i2c-gpio"; |
459 | gpios = <&pioA 30 0 /* sda */ | 544 | gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */ |
460 | &pioA 31 0 /* scl */ | 545 | &pioA 31 GPIO_ACTIVE_HIGH /* scl */ |
461 | >; | 546 | >; |
462 | i2c-gpio,sda-open-drain; | 547 | i2c-gpio,sda-open-drain; |
463 | i2c-gpio,scl-open-drain; | 548 | i2c-gpio,scl-open-drain; |